5. Process Synchronization

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Parallel computing for the finite element method

A finite element method is presented to compute time harmonic microwave fields in three dimensional configurations. Nodal-based finite elements have been coupled with an absorbing boundary condition to solve open boundary problems. This paper describes how the modeling of large devices has been made possible using parallel computation, New algorithms are then proposed to implement this formulation on a cluster of workstations (10 DEC ALPHA 300X) and on a CRAY C98. Analysis of the computation efficiency is performed using simple problems. The electromagnetic scattering of a plane wave by a perfect electric conducting airplane is finally given as example

IP Core for Timed Petri Nets

In this article, we present a Timed Petri Nets Processor which can be directly programmed using Petri Nets formalism vectors and matrixes. This processor can leverage the power of Petri Nets for modeling real-time systems and formally verify their properties, which prevent programming errors. The Petri Nets Processor was developed as an IP-core to be inserted in a Multi-Core system. Therefore, we can model the system requirements with Petri Nets, formally verifying all its properties and by using the IP-core to implement the system is possible to ensure that all properties will be met.http://www.sase.com.ar/2013/files/2013/09/CASE2013_ForoPoster_v5L.pdfFil: Micolini, Orlando. Universidad Nacional de Córdoba. Facultad de Ciencias Exactas, Físicas y Naturales. Laboratorio de Arquitectura de Computadoras; Argentina.Fil: Nonino, Julián. Universidad Nacional de Córdoba. Facultad de Ciencias Exactas, Físicas y Naturales. Laboratorio de Arquitectura de Computadoras; Argentina.Fil: Pisetta, Carlos R. Universidad Nacional de Córdoba. Facultad de Ciencias Exactas, Físicas y Naturales. Laboratorio de Arquitectura de Computadoras; Argentina.Ingeniería Eléctrica y Electrónic

Timing Analysis of Concurrent Programs

Worst-case execution time analysis of multi-threaded software is still a challenge. This comes mainly from the fact that the number of thread interleavings grows exponentially in the number of threads and that synchronization has to be taken into account. In particular, a suitable graph based model has been missing. The idea that thread interleavings can be studied with a matrix calculus is a novel approach in this research area. Our sparse matrix representations of the program are manipulated using Kronecker algebra. The resulting graph represents the multi-threaded program and plays a similar role for concurrent systems as control flow graphs do for sequential programs. Thus a suitable graph model for timing analysis of multi-threaded software has been set up. Due to synchronization it turns out that often only very small parts of the resulting graph are actually needed, whereas the rest is unreachable. A lazy implementation of the matrix operations ensures that the unreachable parts are never calculated. This speeds up processing significantly and shows that our approach is very promising

Requirements for implementing real-time control functional modules on a hierarchical parallel pipelined system

Analysis of a robot control system leads to a broad range of processing requirements. One fundamental requirement of a robot control system is the necessity of a microcomputer system in order to provide sufficient processing capability.The use of multiple processors in a parallel architecture is beneficial for a number of reasons, including better cost performance, modular growth, increased reliability through replication, and flexibility for testing alternate control strategies via different partitioning. A survey of the progression from low level control synchronizing primitives to higher level communication tools is presented. The system communication and control mechanisms of existing robot control systems are compared to the hierarchical control model. The impact of this design methodology on the current robot control systems is explored

A learning experience toward the understanding of abstraction-level interactions in parallel applications

In the curriculum of a Computer Engineering program, concepts like parallelism, concurrency, consistency, or atomicity are usually addressed in separate courses due to their thoroughness and extension. Isolating such concepts in courses helps students not only to focus on specific aspects, but also to experience the reality of working with modern computer systems, where those concepts are often detached in different abstraction levels. However, due to such an isolation, it exists a risk of inducing to the students an absence of interactions between these concepts, and, by extension, between the different abstraction levels of a system. This paper proposes a learning experience showcasing the interactions between abstraction levels addressed in laboratory sessions of different courses. The driving example is a parallel ray tracer. In the different courses, students implement and assemble components of this application from the algorithmic level of the tracer to the assembly instructions required to guarantee atomicity. Each lab focuses on a single abstraction level, but shows students the interactions with the rest of the levels. Technical results and student learning outcomes through the analysis of surveys validate the proposed experience and confirm the students learning improvement with a more integrated view of the system