35 research outputs found

    Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

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    This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

    Switchable wideband receiver frontend for 5G and satellite applications

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    Modern day communication architectures provides the requirement for interconnected devices offering very high data rate (more than 10 Gbps), low latency, and support for multiple service integration across existing communication generations with wideband spectrum coverage. An integrated satellite and 5G architecture switchable receiver frontend is presented in this thesis, consisting of a single pole double throw (SPDT) switch and two low noise amplifiers (LNAs) spanning X-band and K/Ka-band frequencies. The independent X-band LNA (8-12 GHz) has a gain of 38 dB at a centre design frequency of 9.8 GHz, while the K/Ka-band (23-28 GHz) has a gain of 29 GHz at a centre design frequency of 25.4 GHz. Both LNAs are a three-stage cascaded design with separated gate and drain lines for each transistor stage. The broadband high isolation single pole double throw (SPDT) switch based on a 0.15 μm gate length Indium Gallium Arsenide (InGaAs) pseudomorphic high electron transistor (pHEMT) is designed to operate at the frequency range of DC-50 GHz with less than 3 dB insertion loss and more than 40 dB isolation. The switch is designed to improve the overall stability of the system and the gain. A gain of about 25 dB is achieved at 9.8 GHz when the X-band arm is turned on and the K/Ka-band is turned off. A gain of about 23 dB is achieved at 25.4 GHz when the K/Ka-band arm is turned on and the X-band arm is off. This presented switchable receiver frontend is suitable for radar applications, 5G mobile applications, and future broadband receivers in the millimetre wave frequency range

    High-frequency silicon-germanium reconfigurable circuits for radar, communication, and radiometry applications

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    The objective of the proposed research is to create new reconfigurable RF and millimeter-wave circuit topologies that enable significant systems benefits. The market of RF systems has long evolved under a paradigm where once a system is built, performance cannot be changed. Companies have recognized that building flexibility into RF systems and providing mechanisms to reconfigure the RF performance can enable significant benefits, including: the ability support multiple modulation schemes and standards, the reduction of product size and overdesign, the ability to adapt to environmental conditions, the improvement in spectrum utilization, and the ability to calibrate, characterize, and monitor system performance. This work demonstrates X-band LNA designs with the ability to change the frequency of operation, improve linearity, and digitally control the tradeoff between performance and power dissipation. At W-band frequencies, a novel device configuration is developed, which significantly improves state-of-the-art silicon-based switch performance. The excellent switch performance is leveraged to address major issues in current millimeter-wave systems. A front-end built-in-self-test switch topology is developed to facilitate the characterization of millimeter-wave transceivers without expensive millimeter-wave equipment. A highly integrated Dicke radiometer is also created to enable sensitive measurements of thermal noise.Ph.D

    Innovative Design and Realization of Microwave and Millimeter-Wave Integrated circuits

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    Ph.DDOCTOR OF PHILOSOPH

    MILLIMETER-WAVE QUADRATURE RECEIVERS FOR ATMOSPHERIC SENSING AND RADIOMETRY

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    The objective of this research is to investigate the design challenges of millimeter wave (mm-wave) quadrature receivers for emerging applications and develop new ideas to ad- dress these challenges. Next-generation wireless networks, satellite communications, atmospheric sensing instruments, autonomous vehicle radars, and body scanners are targeting to operate at mm-wave frequencies, and high-performance electronics are needed to enable these technologies. In this research, we investigate novel circuit topologies to improve the performance of existing mm-wave quadrature receivers, particularly for radiometry and remote sensing applications. A transformer-based front-end switch is co- designed with an LNA where the transformer acts as the input matching network of the LNA, reducing the front-end loss and system noise figure. Broadband and low-loss quadrature signal generation networks are proposed to provide highly balanced quadrature signals to reject the image frequency content. In addition, a high-efficiency frequency multiplier topology is demonstrated, achieving superior performance compared to the state-of-the-art designs. Lastly, the reliability and noise performance of on-chip noise source devices (PN junctions) in a SiGe BiCMOS platform was characterized and compared. To confirm the advantages of our ideas, the measurement and simulation results of all fabricated circuits are presented and discussed.Ph.D

    Ka-band full duplex system with electrical balance duplexer for 5G applications using SiGe BiCMOS technology

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    The current dominating communication system is 4G. However, with the increase in the data rate and in the number of users in the world, the 4G communication system has started to saturate and couldn’t manage to keep up with user demands and there is less room for progress at 4G systems. In search of finding a system that covers the future interests of users, a new communication scheme is being processed as 5G. The next generation systems require wider bandwidth, high spectral efficiency, and less latency. For these goals, designs with higher frequency and full-duplex operation mode have been started to gain attention. Developments in SiGe HBT technologies -higher fT and fmax- make them suitable for these challenges. Considering these trends which lead to the future of communication systems, in this thesis the design of Ka-band (25-32GHz) SiGe full duplex system with electrical balance duplexer for 5G applications is presented. This system is created by integrating. a duplexer, an LNA, and a PA. The electrical balance duplexer is realized by a hybrid transformer and a balancing network. The impedance of the antenna is mimicked by tuning the balancing network to provide high isolation between transmitter and receiver blocks. All the ports have better than 10dB return loss. Duplexer provides measured 39dB peak isolation at 28GHz, with 3.8dB insertion loss from the transmitter to the antenna and 4.7dB insertion loss from the antenna to receiver. The LNA achieves the measured gain of 15dB, NF of 3.5dB and OP1dB of 13.5dBm at 28GHz by including an input and an output BALUN transformer. The PA provides measured gain of 17dB and OP1dB of 14dBm at 28GH

    W/D-Bands single-chip systems in a 0.13μm SiGe BiCMOS technology-dicke radiometer, and frequency extension module for VNAs

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    Recent advances in silicon-based process technologies have enabled to build low-cost and fully-integrated single-chip millimeter-wave systems with a competitive, sometimes even better, performance with respect to III-V counterparts. As a result of these developments and the increasing demand for the applications in the millimeter-wave frequency range, there is a growing research interest in the field of the design and implementation of the millimeter-wave systems in the recent years. In this thesis, we present two single-chip D-band front-end receivers for passive imaging systems and a single-chip W-band frequency extension module for VNAs, which are implemented in IHP’s 0.13μm SiGe BiCMOS technology, SG13G2, featuring HBTs with ft/fmax of 300GHz/500GHz. First, the designs, implementations, and measurement results of the sub-blocks of the radiometers, which are SPDT switch, low-noise amplifier (LNA), and power detector, are presented. Then, the implementation and experimental test results of the total power and Dicke radiometers are demonstrated. The total power radiometer has a noise equivalent temperature difference (NETD) of 0.11K, assuming an external calibration technique. In addition, the dependence of the NETD of the total power radiometer upon the gain-fluctuation is demonstrated. The NETD of the total power radiometer is 1.3K assuming a gain-fluctuation of %0.1. The front-end receiver of the total power radiometer occupies an area of 1.3 mm2. The Dicke radiometer achieves an NETD of 0.13K, for a Dicke switching of 10 kHz, and its total chip area is about 1.7 mm2. The quiescent power consumptions of the total power and Dicke radiometers are 28.5 mW and 33.8 mW, respectively. The implemented radiometers show the lowest NETD in the literature and the Dicke switching concept is employed for the first time beyond 100 GHz. Second, we present the design methodologies, implementation methods, and results of the sub-blocks of the frequency extension module, such as down-conversion mixer, frequency quadrupler, buffer amplifier, Wilkinson power divider, and dual-directional coupler. Later, the implementation, characterization and experimental test results of the single-chip frequency extension module are demonstrated. The frequency extension module has a dynamic range of about 110 dB, for an IF resolution bandwidth of 10 Hz, with an output power which varies between -4.25 dBm and -0.3 dBm over the W-band. It has an input referred 1-dB compression point of about 1.9 dBm. The directivity of the frequency extension module is better than 10 dB along the entire W-band, and its maximum value is approximately 23 dB at around 75.5 GHz. Finally, the measured s-parameters of a W-band horn-antenna, which are performed by either the designed frequency extension module and a commercial one, are compared. This study is the first demonstration of a single-chip frequency extension module in a silicon-based semiconductor technology

    High-Efficiency Millimeter-Wave Front-Ends for Large Phased-Array Transmitters

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    The ever-increasing demand for wireless broadband connectivity requires infrastructure capable of supporting data transfer rates at multi-Gbps. To accommodate such heavy traffic, the channel capacity for the given spectrum must be utilized as efficiently as possible. Wideband millimeter-wave phased-array systems can enhance the capacity of the channel by providing multiple steerable directional beams. However the cost, complexity, and high power consumption of phased-array systems are key barriers to the commercialization of such technology. Silicon-based beam-former chips and scalable phased-array technology offer promising solutions to lower the cost of phased-array systems. However, the implementation of low-power phased-array architectures is still a challenge. Millimeter-wave power generation in silicon beam-formers suffers from low efficiency. The stringent linearity requirements for multi-beam wideband arrays further limits the achievable efficiency. In scalable phased-arrays, each module consists of an antenna sub-array and a beam-former chip that feeds the antenna elements. To improve efficiency, a design methodology that considers the beam-former chip and the antenna array as one entity is necessary. In this thesis, power-efficient solutions for a millimeter-wave phased-array transmitter are studied and different high-efficiency power amplifier structures for broadband applications are proposed. Initially, the design of a novel 27-30 GHz RF front-end consisting of a variable gain amplifier, a 360 degree phase shifter, and a two-stage linear power amplifier with output power of 12 dBm is described. It is fabricated using 0.13 μm\mu m SiGe technology. This chip serves as the RF core of a beam-former chip with eight outputs for feeding a 2×\times2 dual-feed sub-array. Such sub-arrays are used as part of large phased-arrays for SATCOM infrastructure. Measurement results show 26.7 \% total efficiency for the designed chip. The chip achieves the highest efficiency among Ka-band phased-array transmitters reported in the literature. In addition, original transformer-based output matching structures are proposed for harmonic-tuned power amplifiers. Harmonic-tuned power amplifiers have high peak-efficiency but their complicated output matching structure can limit their use in beam-former RF front-ends. The proposed output matching structures have the layout footprint of a transformer, making their use in beam-former chips feasible. A 26-38 GHz power amplifier based on a non-inverting 1:1 transformer is fabricated. A measured efficiency of more than 27 \% is achieved across the band with an output power of 12 dBm. Furthermore, two continuous class F1F^{-1} power amplifiers using 1:1 inverting transformers are described. Simulation results show a peak-efficiency of 35 \% and output power of 12 dBm from 24 to 30 GHz. A common-base power amplifier with inverting transformer output matching is also demonstrated. This amplifier achieves a peak-efficiency of 42 \% and peak output power of 16 dBm. Finally, a low-loss Ka-band re-configurable output matching structure based on tunable lines is proposed and implemented. A double-stub matching structure with three tunable segments is proposed to maximize the impedance matching coverage. This structure can potentially compensate for the antenna impedance variation in phased-array antennas
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