Index to 1984 NASA Tech Briefs, volume 9, numbers 1-4

Short announcements of new technology derived from the R&D activities of NASA are presented. These briefs emphasize information considered likely to be transferrable across industrial, regional, or disciplinary lines and are issued to encourage commercial application. This index for 1984 Tech B Briefs contains abstracts and four indexes: subject, personal author, originating center, and Tech Brief Number. The following areas are covered: electronic components and circuits, electronic systems, physical sciences, materials, life sciences, mechanics, machinery, fabrication technology, and mathematics and information sciences

Constraint-Aware, Scalable, and Efficient Algorithms for Multi-Chip Power Module Layout Optimization

Moving towards an electrified world requires ultra high-density power converters. Electric vehicles, electrified aerospace, data centers, etc. are just a few fields among wide application areas of power electronic systems, where high-density power converters are essential. As a critical part of these power converters, power semiconductor modules and their layout optimization has been identified as a crucial step in achieving the maximum performance and density for wide bandgap technologies (i.e., GaN and SiC). New packaging technologies are also introduced to produce reliable and efficient multichip power module (MCPM) designs to push the current limits. The complexity of the emerging MCPM layouts is surpassing the capability of a manual, iterative design process to produce an optimum design with agile development requirements. An electronic design automation tool called PowerSynth has been introduced with ongoing research toward enhanced capabilities to speed up the optimized MCPM layout design process. This dissertation presents the PowerSynth progression timeline with the methodology updates and corresponding critical results compared to v1.1. The first released version (v1.1) of PowerSynth demonstrated the benefits of layout abstraction, and reduced-order modeling techniques to perform rapid optimization of the MCPM module compared to the traditional, manual, and iterative design approach. However, that version is limited by several key factors: layout representation technique, layout generation algorithms, iterative design-rule-checking (DRC), optimization algorithm candidates, etc. To address these limitations, and enhance PowerSynth’s capabilities, constraint-aware, scalable, and efficient algorithms have been developed and implemented. PowerSynth layout engine has evolved from v1.3 to v2.0 throughout the last five years to incorporate the algorithm updates and generate all 2D/2.5D/3D Manhattan layout solutions. These fundamental changes in the layout generation methodology have also called for updates in the performance modeling techniques and enabled exploring different optimization algorithms. The latest PowerSynth 2 architecture has been implemented to enable electro-thermo-mechanical and reliability optimization on 2D/2.5D/3D MCPM layouts, and set up a path toward cabinet-level optimization. PowerSynth v2.0 computer-aided design (CAD) flow has been hardware-validated through manufacturing and testing of an optimized novel 3D MCPM layout. The flow has shown significant speedup compared to the manual design flow with a comparable optimization result

JTEC Panel report on electronic manufacturing and packaging in Japan

This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies

A vector light sensor for 3D proximity applications: Designs, materials, and applications

In this thesis, a three-dimensional design of a vector light sensor for angular proximity detection applications is realized. 3D printed mesa pyramid designs, along with commercial photodiodes, were used as a prototype for the experimental verification of single-pixel and two-pixel systems. The operation principles, microfabrication details, and experimental verification of micro-sized mesa and CMOS-compatible inverse vector light pixels in silicon are presented, where p-n junctions are created on pyramid’s facets as photodiodes. The one-pixel system allows for angular estimations, providing spatial proximity of incident light in 2D and 3D. A two-pixel system was further demonstrated to have a wider-angle detection. Multilayered carbon nanotubes, graphene, and vanadium oxide thin films as well as carbon nanoparticles-based composites were studied along with cost effective deposition processes to incorporate these films onto 3D mesa structures. Combining such design and materials optimizations produces sensors with a unique design, simple fabrication process, and readout integrated circuits’ compatibility. Finally, an approach to utilize such sensors in smart energy system applications as solar trackers, for automated power generation optimizations, is explored. However, integration optimizations in complementary-Si PV solar modules were first required. In this multi-step approach, custom composite materials are utilized to significantly enhance the reliability in bifacial silicon PV solar modules. Thermal measurements and process optimizations in the development of imec’s novel interconnection technology in solar applications are discussed. The interconnection technology is used to improve solar modules’ performance and enhance the connectivity between modules’ cells and components. This essential precursor allows for the effective powering and consistent operations of standalone module-associated components, such as the solar tracker and Internet of Things sensing devices, typically used in remote monitoring of modules’ performance or smart energy systems. Such integrations and optimizations in the interconnection technology improve solar modules’ performance and reliability, while further reducing materials and production costs. Such advantages further promote solar (Si) PV as a continuously evolving renewable energy source that is compatible with new waves of smart city technology and systems

Methods and Results of Power Cycling Tests for Semiconductor Power Devices

This work intends to enhance the state of the research in power cycling tests with statements on achievable measurement accuracy, proposed test bench topologies and recommendations on improved test strategies for various types of semiconductor power devices. Chapters 1 and 2 describe the current state of the power cycling tests in the context of design for reliability comprising applicable standards and lifetime models. Measurement methods in power cycling tests for the essential physical parameters are explained in chapter 3. The dynamic and static measurement accuracy of voltage, current and temperature are discussed. The feasibly achievable measurement delay tmd of the maximal junction temperature Tjmax, its consequences on accuracy and methods to extrapolate to the time point of the turn-off event are explained. A method to characterize the thermal path of devices to the heatsink via measurements of the thermal impedance Zth is explained. Test bench topologies starting from standard setups, single to multi leg DC benches are discussed in chapter 4. Three application-closer setups implemented by the author are explained. For tests on thyristors a test concept with truncated sinusoidal current waveforms and online temperature measurement is introduced. An inverter-like topology with actively switching IGBTs is presented. In contrast to standard setups, there the devices under test prove switching capability until reaching the end-of-life criteria. Finally, a high frequency switching topology with low DC-link voltage and switching losses contributing significantly to the overall power losses is presented providing new degrees of freedom for setting test conditions. The particularities of semiconductor power devices in power cycling tests are thematized in chapter 5. The first part describes standard packages and addressed failure mechanisms in power cycling. For all relevant power electronic devices in silicon and silicon carbide, the devices’ characteristics, methods for power cycling and their consequences for test results are explained. The work is concluded and suggestions for future work are given in chapter 6.:Abstract 1 Kurzfassung 3 Acknowledgements 5 Nomenclature 10 Abbreviations 10 Symbols 12 1 Introduction 19 2 Applicable Standards and Lifetime Models 25 3 Measurement parameters in power cycling tests 53 4 Test Bench Topologies 121 5 Semiconductor Power Devices in Power Cycling 158 6 Conclusion and Outlook 229 References 235 List of Publications 253 Theses 257Diese Arbeit bereichert den Stand der Wissenschaft auf dem Gebiet von Lastwechseltests mit Beiträgen zu verbesserter Messgenauigkeit, vorgeschlagenen Teststandstopologien und verbesserten Teststrategien für verschiedene Arten von leistungselektronischen Bauelementen. Kurzgefasst der Methodik von Lastwechseltests. Das erste Themengebiet in Kapitel 1 und Kapitel 2 beschreibt den aktuellen Stand zu Lastwechseltests im Kontext von Design für Zuverlässigkeit, welcher in anzuwendenden Standards und publizierten Lebensdauermodellen dokumentiert ist. Messmethoden für relevante physikalische Parameter in Lastwechseltests sind in Kapitel 3. erläutert. Zunächst werden dynamische und statische Messgenauigkeit für Spannung, Strom und Temperaturen diskutiert. Die tatsächlich erreichbare Messverzögerung tMD der maximalen Sperrschichttemperatur Tjmax und deren Auswirkung auf die Messgenauigkeit der Lastwechselfestigkeit wird dargelegt. Danach werden Methoden zur Rückextrapolation zum Zeitpunkt des Abschaltvorgangs des Laststroms diskutiert. Schließlich wird die Charakterisierung des Wärmepfads vom Bauelement zur Wärmesenke mittels Messung der thermischen Impedanz Zth behandelt. In Kapitel 4 werden Teststandstopologien beginnend mit standardmäßig genutzten ein- und mehrsträngigen DC-Testständen vorgestellt. Drei vom Autor umgesetzte anwendungsnahe Topologien werden erklärt. Für Tests mit Thyristoren wird ein Testkonzept mit angeschnittenem sinusförmigem Strom und in situ Messung der Sperrschichttemperatur eingeführt. Eine umrichterähnliche Topologie mit aktiv schaltenden IGBTs wird vorgestellt. Zuletzt wird eine Topologie mit hoch frequent schaltenden Prüflingen an niedriger Gleichspannung bei der Schaltverluste signifikant zur Erwärmung der Prüflinge beitragen vorgestellt. Dies ermöglicht neue Freiheitsgrade um Testbedingungen zu wählen. Die Besonderheiten von leistungselektronischen Bauelementen werden in Kapitel 5 thematisiert. Der erste Teil beschreibt Gehäusetypen und adressierte Fehlermechanismen in Lastwechseltests. Für alle untersuchten Bauelementtypen in Silizium und Siliziumkarbid werden Charakteristiken, empfohlene Methoden für Lastwechseltests und Einflüsse auf Testergebnisse erklärt. Die Arbeit wird in Kapitel 6 zusammengefasst und Vorschläge zu künftigen Arbeiten werden unterbreitet.:Abstract 1 Kurzfassung 3 Acknowledgements 5 Nomenclature 10 Abbreviations 10 Symbols 12 1 Introduction 19 2 Applicable Standards and Lifetime Models 25 3 Measurement parameters in power cycling tests 53 4 Test Bench Topologies 121 5 Semiconductor Power Devices in Power Cycling 158 6 Conclusion and Outlook 229 References 235 List of Publications 253 Theses 25

NASA Tech Briefs, June 1994

Topics covered include: Microelectronics; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery/Automation; Manufacturing/Fabrication; Mathematics and Information Sciences; Life Sciences; Books and Report

Failure analysis informing intelligent asset management

With increasing demands on the UK’s power grid it has become increasingly important to reform the methods of asset management used to maintain it. The science of Prognostics and Health Management (PHM) presents interesting possibilities by allowing the online diagnosis of faults in a component and the dynamic trending of its remaining useful life (RUL). Before a PHM system can be developed an extensive failure analysis must be conducted on the asset in question to determine the mechanisms of failure and their associated data precursors that precede them. In order to gain experience in the development of prognostic systems we have conducted a study of commercial power relays, using a data capture regime that revealed precursors to relay failure. We were able to determine important failure precursors for both stuck open failures caused by contact erosion and stuck closed failures caused by material transfer and are in a position to develop a more detailed prognostic system from this base. This research when expanded and applied to a system such as the power grid, presents an opportunity for more efficient asset management when compared to maintenance based upon time to replacement or purely on condition

Rinnakkainen yhdistelmätestausmenetelmä elektronisten kokoonpanojen kokonaisvaltaisempaan ja tehokkaampaan luotettavuustestaukseen

Perinteisesti elektroniikan kokoonpanojen luotettavuutta on testattu kiihdytetyillä elinaikatesteillä yhtä rasitusparametriä hyväksikäyttäen. Tässä diplomityössä pyrittiin kehittämään uusi rinnakkainen yhdistelmätestausmenetelmä, joka simuloisi tuotteiden todellisia käyttöolosuhteita todenmukaisemmin. Rasituksien yhdistämisen uskotaan myös nopeuttavan vauriomekanismejä ja täten lyhentävän testaukseen käytettyä aikaa. Työ keskittyi termomekaanisten ja mekaanisten rasitusten yhdistämiseen. Työn kirjallisuusosa käsitteli kiihdytettyjä elinaikatestejä. Oleelliset yhden rasituksen testimenetelmät käytiin läpi ennen syventymistä useita rasitusparametrejä hyödyntäviin testeihin kirjallisuusselvityksen avulla. Työn kokeellisessa osassa yhdistettiin tehosyklaus ja tärinätestaus yhdeksi testimenetelmäksi. Ennen rasitusten yhdistämistä suoritettiin yhden rasitusparametrin tehosykli- ja tärinätestit varsinaisten testiparametrien määrittämiseksi ja rinnakkaistestauksen vikaantumismekanismien selvittämiseksi. Tulokset olivat yhtäpitäviä aikaisempien asiasta suoritettujen tutkimusten kanssa, elinaikojen yhdistelmätestauksessa ollessa huomattavasti lyhyempiä kuin oli oletettu erillisten yhden rasitusparametrin testien tulosten perusteella. Yhdistelmätestauksessa havaitut vikaantumismoodit olivat hyvin samankaltaisia tärinätesteissä havaittujen moodien kanssa ja vaurioitumisnopeuden kasvun oletettiin johtuvan juoteliitoksien lämpötilasta aiheutuvien mekaanisten ominaisuuksien muutoksista. Tulokset osoittivat, että testiparametrien huolellisella valinnalla voidaan uudella menetelmällä saavuttaa todellisia käyttöympäristöjä todenmukaisemmin edustava rasitusympäristö sekä lyhentää testiaikoja merkittävästi. On myös huomioitava, että yksittäin lähes merkityksettömillä rasituksilla saattaa olla merkittäviä yhteisvaikutuksia luotettavuuteen, joita ei voida huomioida perinteisillä yhden rasituksen testeillä.Traditionally the reliability and lifetime predictions of electronic assemblies have been conducted by employing single load accelerated life tests. This thesis aimed to develop a new concurrent reliability testing method that would offer a more realistic representation of actual use environments. Additionally, the combination of several loadings is expected to accelerate the damage accumulation, thus decreasing the associated testing times and costs. The focus was on the combination of thermomechanical and mechanical loads. Accelerated life tests were analyzed in the literature part. The relevant conventional accelerated life tests utilizing a single loading parameter were discussed before addressing multiple loading tests by giving a literature review on the current status of the subject. The experimental part combined power cycling and vibration loading into a single concurrent test method. To determine the actual test parameters and to clarify the failure modes and mechanisms in concurrent loading, single loading tests were conducted before the loads were combined. The experimental results were consistent with the previous results reported in literature with observed lifetimes considerably shorter than expected based on the single load test results. Observed failure modes in concurrent testing closely resembled those observed in pure mechanical loading, but the accelerated damage accumulation rate was attributed to the temperature related change of material properties. It was concluded that when the loading parameters are carefully set, significant improvements in both the lifelikeness of the loading conditions and in effectiveness can be achieved with the new test method. The results indicated that even under relatively small magnitude single loads the interactions of the various loadings can have significant effects on reliability that cannot be accounted for with single load tests

Prognostics and Health Management of Electronics by Utilizing Environmental and Usage Loads

Prognostics and health management (PHM) is a method that permits the reliability of a system to be evaluated in its actual application conditions. Thus by determining the advent of failure, procedures can be developed to mitigate, manage and maintain the system. Since, electronic systems control most systems today and their reliability is usually critical for system reliability, PHM techniques are needed for electronics. To enable prognostics, a methodology was developed to extract load-parameters required for damage assessment from irregular time-load data. As a part of the methodology an algorithm that extracts cyclic range and means, ramp-rates, dwell-times, dwell-loads and correlation between load parameters was developed. The algorithm enables significant reduction of the time-load data without compromising features that are essential for damage estimation. The load-parameters are stored in bins with a-priori calculated (optimal) bin-width. The binned data is then used with Gaussian kernel function for density estimation of the load-parameter for use in damage assessment and prognostics. The method was shown to accurately extract the desired load-parameters and enable condensed storage of load histories, thus improving resource efficiency of the sensor nodes. An approach was developed to assess the impact of uncertainties in measurement, model-input, and damage-models on prognostics. The approach utilizes sensitivity analysis to identify the dominant input variables that influence the model-output, and uses the distribution of measured load-parameters and input variables in a Monte-Carlo simulation to provide a distribution of accumulated damage. Using regression analysis of the accumulated damage distributions, the remaining life is then predicted with confidence intervals. The proposed method was demonstrated using an experimental setup for predicting interconnect failures on electronic board subjected to field conditions. A failure precursor based approach was developed for remaining life prognostics by analyzing resistance data in conjunction with usage temperature loads. Using the data from the PHM experiment, a model was developed to estimate the resistance based on measured temperature values. The difference between actual and estimated resistance value in time-domain were analyzed to predict the onset and progress of interconnect degradation. Remaining life was predicted by trending several features including mean-peaks, kurtosis, and 95% cumulative-values of the resistance-drift distributions