Field Programmable Port Extender (FPX) User Guide (Version 2.2)

This manual summarizes how to insert the Field Programmable Port Extender (FPX) into the Washington University Gigabit Switch (WUGS), how to install the NCHARGE control software, how to initialize the system, and how to reprogram a user-defined module into the FPX over the network using the included web-based tools

An Fpga-Based Reconfigurable Digital Chip Tester

This project presents the project work and results of an FPGA-based Reconfigurable Digital Chip Tester. The aim of this project is to achieve a reconfigurable, userfriendly and cost-effective digital chip tester for users to perform chip testing on the most commonly used digital ICs

Studies in Software-Defined Radio System Implementation

Over the past decade, software-defined radios (SDRs) have an increasingly prevalent aspect of wireless communication systems. Different than traditional hardware radios which implement radio protocols using static electrical circuit, SDRs implement significant aspects of physical radio protocol using software programs running on a host processor. Because they use software to implement most of the radio functionality, SDRs are much more easily modified, edited, and upgraded than their hardware-defined counterparts. Consequently, researchers and developers have been developing previously hardware-defined radio systems within software. Thus, communication standards can be tested under different conditions or swapped out entirely by simply changing some code. Additionally, developers hope to implement more advanced functionality with SDRs such as cognitive radios that can sense the conditions of the environment and change parameters or protocol accordingly. This paper will outline the major aspects of SDRs including their explanation, advantages, and architecture. As SDRs have become more commonplace, many companies and organizations have developed hardware front-ends and software packages to help develop software radios. The most prominent hardware front-ends to date have been the USRP hardware boards. Additionally, many software packages exist for SDR development, including the open source GNU Radio and OSSIE and the closed source Simulink and Labview SDR packages. Using these development tools, researchers have developed many of the most relevant radio standards. This paper will explain the major hardware and software development tools for creating SDRs, and it will explain some of the most important SDR projects that have been implemented to date

Implementation of a software defined radio on FPGAs using system generator

The aim of this thesis is to implement a Software Defined Radio based wireless communication system using a Xilinx Spartan 3E Field Programmable Gate Array. Software Defined Radio refers to the class of reprogrammable radios in which the same piece of hardware can perform different functions at different times. Xilinx’s System Generator for Digital Signal Processor tool is used to simulate and implement AM modulation on the Spartan 3E Starter Board. The aim of this thesis is to implement a Software Defined Radio based wireless communication system using a Xilinx Spartan 3E Field Programmable Gate Array. Software Defined Radio refers to the class of reprogrammable radios in which the same piece of hardware can perform different functions at different times. Xilinx’s System Generator for Digital Signal Processor tool is used to simulate and implement AM modulation on the Spartan 3E Starter Board

Timing verification of dynamically reconfigurable logic for Xilinx Virtex FPGA series

This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standard hardware design and verification tools to the design of dynamically reconfigurable logic (DRL). The technique involves the conversion of a dynamic design into multiple static designs, suitable for input to standard synthesis and APR tools. For timing and functional verification after APR, the sections of the design can then be recombined into a single dynamic system. The technique has been automated by extending an existing DRL design tool named DCSTech, which is part of the Dynamic Circuit Switching (DCS) CAD framework. The principles behind the tools are generic and should be readily extensible to other architectures and CAD toolsets. Implementation of the dynamic system involves the production of partial configuration bitstreams to load sections of circuitry. The process of creating such bitstreams, the final stage of our design flow, is summarized

Design and Implemetation of FPGA based Software Defined Radio Using Simulink HDL Coder

This paper presents the design procedure and implementation results of a proposed software defined radio (SDR) using Altera Cyclone II family board. The implementation uses Matlab/SimulinkTM, Embedded MatlabTM blocks, and Cyclone II development and educational board. The design has first implemented in Matlab/SimulinkTM environment. It is then converted to VHDL level using Simulink HDL coder. The design is synthesized and fitted with Quartus II 9.0 Web Edition® software, and downloaded to Altera Cyclone II board. The results show that it is easy to develop and understand the implementation of SDR using programmable logic tools. The paper also presents an efficient design flow of the procedure followed to obtain VHDL netlists that can be downloaded to FPGA boards

Basic Robotics Curriculum: An Introductionary Unit for Junior High School Students

The purpose of this project was to research and develop a robotics curriculum appropriate to junior high school students. Specifically, this project developed a two-week, ten-hour robotic curriculum to introduce eighth-grade students to basic robotic concepts. After a careful examination of the related literature and after an evaluation of current trends in robotic education, objectives were developed. The objectives integrated content from industrial arts, science, college-level courses on robotics, and very basic concepts used in elementary schools as an introduction to robotics. Lessons were developed which used a multisensory approach and activities emphasized hands on experiences for students. Conclusions which were drawn after a review of related literature, development of the curriculum, and pilot testing are included along with recommendations for possible improvement and expansion of this project. The importance of keeping pace with developing technologies is stressed throughout the curriculum which was developed

ZyCAP : efficient partial reconfiguration management on the Xilinx Zynq

New hybrid FPGA platforms that couple processors with a reconfigurable fabric, such as the Xilinx Zynq, offer an alternative view of reconfigurable computing where software applications leverage hardware resources through the use of often reconfigured accelerators. For this to be feasible, reconfiguration overheads must be reduced so that the processor is not burdened with managing the process. We discuss partial reconfiguration (PR) on these architectures, and present an open source controller, ZyCAP, that overcomes the limitations of existing methods, offering more effective use of hardware resources in such architectures. ZyCAP combines high-throughput configuration with a high-level software interface that frees the processor from detailed PR management, making PR on the Zynq easy and efficient