First-principles theoretical evaluation of crystalline zirconia and hafnia as gate oxides for Si microelectronics

Parameters determining the performance of the crystalline oxides zirconia (ZrO_2) and hafnia (HfO_2) as gate insulators in nanometric Si electronics are estimated via ab initio calculations of the energetics, dielectric properties, and band alignment of bulk and thin-film oxides on Si (001). With their large dielectric constants, stable and low-formation-energy interfaces, large valence offsets, and reasonable (though not optimal) conduction offsets (electron injection barriers), zirconia and hafnia appear to have a considerable potential as gate oxides for Si electronics.Comment: RevTeX 4 pages, 3 eps figure

HfO2 as gate dielectric on Si and Ge substrate

Hafnium oxide HfO2 has been considered as an alternative to silicon dioxide SiO2 in future nano-scale complementary metal-oxide-semiconductor (CMOS) devices since it provides the required capacitance at the reduced device size because of its high dielectric constant. HfO2 films are currently deposited by various techniques. Many of them require high temperature annealing that can impact device performance and reliability. In this research, electrical characteristics of capacitors with HfO2 as gate dielectric deposited by standard thermal evaporation and e-beam evaporation on Si and Ge substrates were investigated. The dielectric constant of HfO2 deposited by thermal evaporation on Si is in the range of 18-25. Al/HfO2/Si MOS capacitors annealed at 450°C show low hysteresis, leakage current density and bulk oxide charges. Interface state density and low temperature charge trapping behavior of these structures were also investigated. Degradation in surface carrier mobility has been reported in Si field-effect-transistors with HfO2 as gate dielectric. To explore the possibility of alleviating this problem we have used germanium (Ge) substrate as this semiconductor has higher carrier mobility than Si. Devices fabricated by depositing HfO2 directly on Ge by standard thermal evaporation were found to be too leaky and show significant hysteresis and large shift in flatband voltage. This deterioration in electrical performance is mainly due to the formation of unstable interfacial layer of GeO2 during the HfO2 deposition. To minimize this effect, Ge surface was treated with the beam of atomic nitrogen prior to the dielectric deposition. The effect of surface nitridation, on interface as well as on bulk oxide, trap energy levels were investigated using low temperature C-V measurements. They revealed additional defect levels in the nitrided devices indicating diffusion of nitrogen from interface into the bulk oxide. Impact of surface nitridation on the reliability of Ge/HfO2/Al MOS capacitors has been investigated by application of constant voltage stress at different voltage levels for various time periods. It was observed that deeper trap levels in nitrided devices, found from low frequency and low temperature measurements, trap the charge carrier immediately after stress but with time these carriers detrap and create more traps inside the bulk oxide resulting in further devices deterioration. It is inferred that though nitrogen is effective in reducing interfacial layer growth it incorporates more defects at interface as well as in bulk oxide. Therefore, it is important to look into alternative methods of surface passivation to limit the growth of GeO2 at the interface

Germanium MOS devices integrating high-k dielectric and metal gate

textThis dissertation investigates the fabrication and characteristics of the metaloxide-semiconductor (MOS) devices built on germanium substrates integrating HfO2 high-κ dielectric and TaN metal gate electrode. The metal-gate/high-κ/germanium MOS stack, by taking the advantages of the high carrier mobility from the germanium channel and the sub-nm equivalent-oxide-thickness (EOT) scaling capability from the high-κ dielectric and the metal gate electrode, offers a possible solution for the future advanced complementary MOS (CMOS) applications to further boast the transistors’ driving current for faster operation. Due to the unstable and poor-quality natively grown germanium oxide, surface treatment is very critical in germanium device fabrication in order to remove the native oxide and prevent its growth, as well as suppress the interdiffusion across the interface. Several wet cleaning methods and an in situ cleaning technique by Ar anneal have been investigated. Surface passivation techniques, including NH3-based surface nitridation (SN) by forming a GeOxNy layer and silicon interlayer (SiIL) passivation by growing an ultra-thin (several monolayer) silicon layer between the high-κ dielectric and the substrate, have been studied and proved able to improve device performance significantly. Both p- and n-channel germanium transistors have been successfully fabricated. 1.8X enhancement of peak mobility in p-channel and 2.5X in n-channel over the silicon control devices have been achieved. The interface growth mechanism between the germanium substrate and the dielectric layer has been investigated. Two competing processes occurring at the interface determine the formation of the interfacial layer and affect Ge outdiffusion. Substrate dopants are found playing important roles, which causes the variations in the interfacial layer formation on different types of substrates and so on in the electrical properties. The relatively high diffusivity of dopants and germanium atoms in bulk germanium and the induced structural defects near the surface may severely degrade the device performance. This can well explain the very poor performance of the n-channel devices reported recently by several groups. Performance degradation of the germanium devices after thermal anneal, which is resulting from the interdiffusion and germanium oxide desorption, suggests that thermal stability is a concern in high temperature processes and more stable passivation techniques may be required. Long term reliability study indicates that HfO2 dielectric with SN treatment on germanium is robust against TDDB stress and the long term reliability (TDDB) is not a concern for germanium MOS devices.Electrical and Computer Engineerin

Effect of cycling on ultra-thin HfZrO4, ferroelectric synaptic weights

Two-terminal ferroelectric synaptic weights are fabricated on silicon. The active layers consist of a 2 nm thick WOx film and a 2.7 nm thick HfZrO4 (HZO) film grown by atomic layer deposition. The ultra-thin HZO layer is crystallized in the ferroelectric phase using a millisecond flash at a temperature of only 500 °C, evidenced by x-rays diffraction and electron microscopy. The current density is increased by four orders of magnitude compared to weights based on a 5 nm thick HZO film. Potentiation and depression (analog resistive switching) is demonstrated using either pulses of constant duration (as short as 20 nanoseconds) and increasing amplitude, or pulses of constant amplitude (+/−1 V) and increasing duration. The cycle-to-cycle variation is below 1%. Temperature dependent electrical characterisation is performed on a series of device cycled up to 108 times: they reveal that HZO possess semiconducting properties. The fatigue leads to a decrease, in the high resistive state only, of the conductivity and of the activation energy.ISSN:2634-438

Investigation of Gate Dielectric Materials and Dielectric/Silicon Interfaces for Metal Oxide Semiconductor Devices

The progress of the silicon-based complementary-metal-oxide-semiconductor (CMOS) technology is mainly contributed to the scaling of the individual component. After decades of development, the scaling trend is approaching to its limitation, and there is urgent needs for the innovations of the materials and structures of the MOS devices, in order to postpone the end of the scaling. Atomic layer deposition (ALD) provides precise control of the deposited thin film at the atomic scale, and has wide application not only in the MOS technology, but also in other nanostructures. In this dissertation, I study rapid thermal processing (RTP) treatment of thermally grown SiO2, ALD growth of SiO2, and ALD growth of high-k HfO2 dielectric materials for gate oxides of MOS devices. Using a lateral heating treatment of SiO2, the gate leakage current of SiO2 based MOS capacitors was reduced by 4 order of magnitude, and the underlying mechanism was studied. Ultrathin SiO2 films were grown by ALD, and the electrical properties of the films and the SiO2/Si interface were extensively studied. High quality HfO2 films were grown using ALD on a chemical oxide. The dependence of interfacial quality on the thickness of the chemical oxide was studied. Finally I studied growth of HfO2 on two innovative interfacial layers, an interfacial layer grown by in-situ ALD ozone/water cycle exposure and an interfacial layer of etched thermal and RTP SiO2. The effectiveness of growth of high-quality HfO2 using the two interfacial layers are comparable to that of the chemical oxide. The interfacial properties are studied in details using XPS and ellipsometry

HfO₂-based ferroelectrics:From enhancing performance, material design, to applications

Nonvolatile memories are in strong demand due to the desire for miniaturization, high-speed storage, and low energy consumption to fulfill the rapid developments of big data, the Internet of Things, and artificial intelligence. Hafnia (HfO2)-based materials have attracted significant interest due to the advantages of complementary-metal-oxide-semiconductor (CMOS) compatibility, large coercive voltage, and superior ferroelectricity at an ultra-thin thickness. The comparable ferroelectricity to that of traditional perovskite materials and size advantage of HfO2 result in fascinating storage performance, which can be readily applicable to the fields of integrated non-volatile memories. This Review provides a comprehensive overview of recent developments in HfO2-based ferroelectrics with attention to the origin of ferroelectricity, performance modulation, and recent achievements in the material. Moreover, potential solutions to existing challenges associated with the materials are discussed in detail, including the wake-up effect, long-term fatigue behavior, and imprint challenges, which pave the way for obtaining HfO2-based ferroelectric materials and devices with long service life and high stability. Finally, the range of potential applications for these fascinating new materials is presented and summarized, which include non-volatile memories and neuromorphic systems. This Review intends to present the state-of-the-art HfO2-based ferroelectrics and to highlight the current challenges, possible applications, and future opportunities and can act as an update for recent developments in these intriguing materials and provide guidance for future researchers in the design and optimization of HfO2-based ferroelectric materials and devices. </p

Gate stack engineering of germanium mosfets with high-K dielectrics

Ph.DDOCTOR OF PHILOSOPH

Understanding the Mechanism of Electronic Defect Suppression Enabled by Nonidealities in Atomic Layer Deposition.

Silicon germanium (SiGe) is a multifunctional material considered for quantum computing, neuromorphic devices, and CMOS transistors. However, implementation of SiGe in nanoscale electronic devices necessitates suppression of surface states dominating the electronic properties. The absence of a stable and passive surface oxide for SiGe results in the formation of charge traps at the SiGe-oxide interface induced by GeOx. In an ideal ALD process in which oxide is grown layer by layer, the GeOx formation should be prevented with selective surface oxidation (i.e., formation of an SiOx interface) by controlling the oxidant dose in the first few ALD cycles of the oxide deposition on SiGe. However, in a real ALD process, the interface evolves during the entire ALD oxide deposition due to diffusion of reactant species through the gate oxide. In this work, this diffusion process in nonideal ALD is investigated and exploited: the diffusion through the oxide during ALD is utilized to passivate the interfacial defects by employing ozone as a secondary oxidant. Periodic ozone exposure during gate oxide ALD on SiGe is shown to reduce the integrated trap density (Dit) across the band gap by nearly 1 order of magnitude in Al2O3 (&lt;6 × 1010 cm-2) and in HfO2 (&lt;3.9 × 1011 cm-2) by forming a SiOx-rich interface on SiGe. Depletion of Ge from the interfacial layer (IL) by enhancement of volatile GeOx formation and consequent desorption from the SiGe with ozone insertion during the ALD growth process is confirmed by electron energy loss spectroscopy (STEM-EELS) and hypothesized to be the mechanism for reduction of the interfacial defects. In this work, the nanoscale mechanism for defect suppression at the SiGe-oxide interface is demonstrated, which is engineering of diffusion species in the ALD process due to facile diffusion of reactant species in nonideal ALD

Electrical characterization of high-k gate dielectrics for advanced CMOS gate stacks

The oxide/substrate interface quality and the dielectric quality of metal oxide semiconductor (MOS) gate stack structures are critical to future CMOS technology. As SiO2 was replaced by the high-k dielectric to further equivalent oxide thickness (EOT), high mobility substrates like Ge have attracted increasing in replacing Si substrate to further enhance devices performance. Precise control of the interface between high-k and the semiconductor substrate is the key of the high performance of future transistor. In this study, traditional electrical characterization methods are used on these novel MOS devices, prepared by advanced atomic layer deposition (ALD) process and with pre and post treatment by plasma generated by slot plane antenna (SPA). MOS capacitors with a TiN metal gate/3 nm HfAlO/0.5 nm SiO2/Si stacks were fabricated by different Al concentration, and different post deposition treatments. A simple approach is incorporated to correct the error, introduced by the series resistance (Rs) associated with the substrate and metal contact. The interface state density (Dit), calculated by conductance method, suggests that Dit is dependent on the crystalline structure of hafnium aluminum oxide film. The amorphous structure has the lowest Dit whereas crystallized HfO2 has the highest Dit. Subsequently, the dry and wet processed interface layers for three different p type Ge/ALD 1nm-Al2O3/ALD 3.5nm-ZrO2/ALD TiN gate stacks are studied at low temperatures by capacitance-voltage (CV),conductance-voltage (GV) measurement and deep level transient spectroscopy (DLTS). Prior to high-k deposition, the interface is treated by three different approaches (i) simple chemical oxidation (Chemox); (ii) chemical oxide removal (COR) followed by 1 nm oxide by slot-plane-antenna (SPA) plasma (COR&SPAOx); and (iii) COR followed by vapor O3 treatment (COR&O3). Room temperature measurement indicates that superior results are observed for slot-plane-plasma-oxidation processed samples. The reliability of TiN/ZrO2/Al2O3/p-Ge gate stacks is studied by time dependent dielectric breakdown (TDDB). High-k dielectric is subjected to the different slot plane antenna oxidation (SPAO) processes, namely, (i) before high-k ALD (Atomic Layer Deposition), (ii) between high-k ALD, and (iii) after high-k ALD. High-k layer and interface states are improved due to the formation of GeO2 by SPAO when SPAO is processed after high-k. GeO2 at the interface can be degraded easily by substrate electron injection. When SPAO is processed between high-k layers, a better immunity of interface to degradation was observed under stress. To further evaluate the high-k dielectrics and how EOT impacts on noise mechanism time zero 1/f noise is characterized on thick and thin oxide FinFET transistors, respectively. The extracted noise models suggest that as a function of temperatures and bias conditions the flicker noise mechanism tends to be carrier number fluctuation model (McWhorter model). Furthermore, the noise mechanism tends to be mobility fluctuation model (Hooge model) when EOT reduces