Integrated Circuits Based on 300 GHz fT Metamorphic HEMT Technology for Millimeter-Wave and Mixed-Signal Applications

Advanced circuits based on metamorphic HEMT (MHEMT)technologies on 4 ”GaAs substrates for both millimeter-wave,and mixed- signal applications are presented.Extrinsic cut-off frequencies of ft =293 GHz and fmax =337 GHz were achieved for a 70 nm gate length metamorphic HEMT echnology.The MMIC process obtains high yield on transistor and circuit level.Single-stage low-noise amplifiers demonstrate a small signal gain of 13 dB and a noise figure of 2.8 dB at 94 GHz.An amplifier MMIC developed for D-Band operation features a gain of 15 dB at 160 GHz.The achieved results are comparable to state- of-the-art InP-based HEMT technologies.In order to realize 80 Gbit/s digital circuits,a process with 100 nm gate length enhancement type HEMTs with a transit frequency of 200 GHz is used.Three metalization layers are available for interconnects.The parasitic capacitance of the interconnects is kept low by using BCB and plated air bridge technology.Based on this process,static and dynamic frequency dividers achieve a maximu toggle frequency of 70 GHz and 108 GHz,respectively

An Overview of Solid-State Integrated Circuit Amplifiers in the Submillimeter-Wave and THz Regime

We present an overview of solid-state integrated circuit amplifiers approaching terahertz frequencies based on the latest device technologies which have emerged in the past several years. Highlights include the best reported data from heterojunction bipolar transistor (HBT) circuits, high electron mobility transistor (HEMT) circuits, and metamorphic HEMT (mHEMT) amplifier circuits. We discuss packaging techniques for the various technologies in waveguide modules and describe the best reported noise figures measured in these technologies. A consequence of THz transistors, namely ultra-low-noise at cryogenic temperatures, will be explored and results presented. We also present a short review of power amplifier technologies for the THz regime. Finally, we discuss emerging materials for THz amplifiers into the next decade

The development of sub-25 nm III-V High Electron Mobility Transistors

High Electron Mobility Transistors (HEMTs) are crucially important devices in microwave circuit applications. As the technology has matured, new applications have arisen, particularly at millimetre-wave and sub-millimetre wave frequencies. There now exists great demand for low-visibility, security and medical imaging in addition to telecommunications applications operating at frequencies well above 100 GHz. These new applications have driven demand for high frequency, low noise device operation; key areas in which HEMTs excel. As a consequence, there is growing incentive to explore the ultimate performance available from such devices. As with all FETs, the key to HEMT performance optimisation is the reduction of gate length, whilst optimally scaling the rest of the device and minimising parasitic extrinsic influences on device performance. Although HEMTs have been under development for many years, key performance metrics have latterly slowed in their evolution, largely due to the difficulty of fabricating devices at increasingly nanometric gate lengths and maintaining satisfactory scaling and device performance. At Glasgow, the world-leading 50 nm HEMT process developed in 2003 had not since been improved in the intervening five years. This work describes the fabrication of sub-25 nm HEMTs in a robust and repeatable manner by the use of advanced processing techniques: in particular, electron beam lithography and reactive ion etching. This thesis describes firstly the development of robust gate lithography for sub-25 nm patterning, and its incorporation into a complete device process flow. Secondly, processes and techniques for the optimisation of the complete device are described. This work has led to the successful fabrication of functional 22 nm HEMTs and the development of 10 nm scale gate pattern transfer: simultaneously some of the shortest gate length devices reported and amongst the smallest scale structures ever lithographically defined on III-V substrates. The first successful fabrication of implant-isolated planar high-indium HEMTs is also reported amongst other novel secondary processes

3-5족 화합물 반도체의 웨이퍼 접합과 에피택셜 리프트 오프를 통한 다중 파장 광 검출기

학위논문 (박사)-- 서울대학교 대학원 : 공과대학 재료공학부, 2019. 2. 윤의준.Group III-V compound semiconductors, having a band gap from ultraviolet to infrared regions, have been widely used as imagers to visualize a single band. With the recent arrival of the Internet-of-things (IOTs) era, new applications such as time of flight (TOF) sensors, normalized difference vegetation index (NVDI) and night vision systems have gained interest. Therefore, the importance of multicolor photodetectors is raised. To implement multicolor photodetectors, an epitaxy method has been commonly used with III-V compound semiconductors. For example, quantum wells, quantum dots and type-II based structures and metamorphically grown bulk heteroepitaxial structures have been employed. Although an epitaxy method seems to be quite simple, there are several problems including limitation of material choice due to the discrepancy of lattice constants between thin films and substrates, performance degradation originated from internal defects and complexity of growth. Therefore, to avoid these disadvantages of the epitaxy method, a heterogeneous integration method has been an alternative because the integration of devices grown on different substrates is possible. Thus, it has been considered to be a promising method to combine photodetectors with simple bulk structures. However, although there is a significant advantage to the heterogeneous integration method, current multicolor photodetectors have exhibited limitations regarding pixel density and vertical misalignment due to problems related to conventional integration methods. Therefore, in this thesis, the heterogeneous integration of III-V compound semiconductors was investigated for fabricating multicolor photodetectors with high pixel density and highly accurate alignment. Firstly, a research on heterogeneous integration of GaAs based thin film devices with other substrates was carried out. We studied wafer bonding and epitaxial lift off process which have advantages including large area transferability, cost-effectiveness and high quality of layers compared with wafer splitting and transfer printing methods. To fabricate multicolor photodetectors on single substrates, a stable rigid-to-rigid heterogeneous integration method is highly required. However, there have only been few reports regarding rigid-to-rigid transfer by using epitaxial lift off due to the difficulty involving byproducts and gas bubbles generated during the wet etching of the sacrificial layer for wafer separation. This has been a hindrance compared with thin film on flexible substrates which can accelerate wafer separation by using strain and external equipment. In order to overcome this problem, high throughput epitaxial lift off process was proposed through a pre-patterning process and surface hydrophilization. The pre-patterning process can maximize the etching area of the AlAs sacrificial layer and rapidly remove bubbles. In addition, acetone, which is a hydrophilic solution, was mixed with hydrofluoric acid in order to reduce the surface contact angle and viscosity. It resulted in an effective penetration of the etching solution and the suppression of byproducts. Consequently, it was possible to transfer GaAs thin films on rigid substrates within 30 minutes for a 2 inch wafer which has been the fastest compared with previous reports. Also, using this template, electronic and optoelectronic devices were successfully fabricated and operated. Secondly, we have studied to overcome restrictions of bulk photodetector for InSb binary material including the detection limit and cryogenic operation. To extend the detection limit of bulk InSb toward the LWIR range, the ideal candidate of III-V bulk materials is indium arsenide antimonide (InAsSb) material due to its corresponding band gaps ranging from SWIR to LWIR. By combining bulk InAsSb with other bulk materials with previously developed integration methods, we could ultimately fabricate a multicolor photodetector ranging from ultraviolet to LWIR with only bulk structures. Thus, in order to verify the viability of this material, a p-i-n structure based photodetector with an InAs0.81Sb0.19 absorption layer was grown on a GaAs substrate. To enhance an ability to be operated at a high temperature, an optimum InAlSb barrier layer was designed by technology computer aided design (TCAD). Also, InAsSb/InAlSb heterojunction photodetector was grown by molecular beam epitaxy (MBE). As a result, we have demonstrated the first room temperature operation of heterojunction photodetectors in MWIR range among InAsSb photodetectors with similar Sb compositions. Additionally, it has a higher responsivity of 15 mA/W compared with commercialized photodetectors. This MWIR photodetector with room temperature operability could help the reduction of the volume for final detector systems due to the elimination of Dewar used in InSb photodetectors. In other words, from this experiments, it is suggested that there is a strong potential of InAsSb bulk structures for detecting LWIR. Finally, the study on the monolithic integration was carried out to verify the feasibility of multicolor photodetectors by integration of bulk structures. Among procured photodetectors with detection ranging from visible to MWIR at room temperature operation, visible GaAs and near-infrared InGaAs photodetector were used for establishing the optimized fabrication process due to materials process maturity. By using previously developed high throughput ELO process, GaAs photodetectors were transferred onto InGaAs photodetectors to form visible/near-infrared multicolor photodetectors. It was found that top GaAs PD and bottom InGaAs PD were vertically well aligned without an off-axis tilt in x-ray diffraction (XRD) measurement. Also, similar dark currents of each photodetector were observed compared with reference photodetectors. Finally, with incidence of laser illumination, photoresponses were clearly revealed in visible band and near-infrared band of material characteristics, respectively. These results suggested high throughput ELO process enables the monolithic integration of bulk based multicolor photodetectors on a single substrate with high pixel density and nearly perfect vertical alignment. In the future, depending on the target applications, photodetectors with desired wavelengths could be simply grown as bulk structures and fabricated for multicolor imagers.자외선부터 적외선 영역의 밴드갭을 가진 3-5족 화합물 반도체는 단일 파장대역을 시각화하는 imager 로 널리 사용되고 있다. 그러나, 최근 사물인터넷 시대가 도래함에 따라, time of flight (TOF) 센서, 식생지수 측정, night vision 등의 새로운 응용처가 증가하고 있다. 따라서 기존의 단일파장 광 검출기가 아닌, 다중파장 광 검출기의 중요성이 증대되고 있으며, 이런 다중파장 광 검출기를 구현하기 위해서 3-5족을 화합물 반도체의 epitaxy 방법이 흔히 사용되어 왔다. 예를 들어, 다른 격자 상수를 가진 벌크 구조를 metamorphic 성장법을 이용하여 성장하거나, 또는 양자우물, 양자점 그리고 type-II 기반의 구조가 적용되어야만 했다. Epitaxy 방법은 매우 간단한 방법처럼 보이지만, 기판과 성장하려는 물질간의 격자상수의 차이로 인해 제한되는 물질 선택, 내부 결함에 의한 성능감소 그리고 성장의 복잡함 등 여러 문제가 존재한다. 그래서, epitaxy 방법의 단점들을 회피하기 위하여, 다른 기판에서 성장된 소자의 집적을 가능하게 할 수 있는, 이종 집적 방법이 대안이 되어왔다. 이를 이용하면, 간단한 벌크 구조의 광 검출기를 결합할 수 있기 때문에 매우 유망한 방법으로 여겨지고 있다. 그러나, 이종 집적 방법의 뛰어난 장점에도 불구하고, 현재의 다중파장 광 검출기는 집적 방법의 문제로 수직 정렬 오차 및 픽셀 밀도 측면에서 한계점을 보여주었다. 따라서, 본 논문에서는 고밀도/ 고정렬된 다중파장 광 검출기 제작을 위한 3-5족 기반의 화합물 반도체의 이종 집적 방법에 대한 연구를 진행하였다. 먼저, 3-5족 GaAs 기반의 박막소자를 다른 기판과 이종 집적하는 연구를 수행하였다. 기존의 wafer splitting 과 transfer printing 방법과 비교했을 때 대면적 전사, 저렴한 가격 그리고 고품질 layer등 장점들이 있는 웨이퍼 접합과 에피택셜 리프트 오프 (epitaxial lift off) 방법에 대해서 연구를 하였다. 단일 기판상에 다중파장 광 검출기를 제작하기 위해서는, rigid-to-rigid 이종 집적 방법이 반드시 필요하다. 그러나, strain 과 외부 장치를 이용하여 기판 분리를 가속화 시킬 수 있는 유연기판 상의 박막전사와 달리, 습식 식각 시 생성되는 부산물들과 가스 기포들 때문에 에피택셜 리프트 오프 방법을 이용한 rigid-to-rigid 전사에 대해서는 매우 적은 결과만이 보고되었다. 이런 문제를 극복하기 위해서, pre-patterning 과정과 표면 친수화를 통한 고속 에피택셜 리프트 오프를 제안하였다. 이 pre-patterning 과정은 AlAs 희생층의 식각 영역을 극대화 시킬 수 있으며, 기포를 빠르게 제거할 수 있다. 그리고, 친수성 용액인 아세톤을 불산과 섞어주면 점도와 표면 접촉 각을 줄일 수 있다. 이것은 식각 용액의 효과적인 침투와 부산물을 억제시키는 결과를 보였다. 결과적으로, 2 인치 크기의GaAs 기반 박막들을 rigid 기판상에 30분 이내로 전사가 가능했으며 이는 기존의 보고들과 비교했을 때 가장 빠른 결과이다. 또한 이 템플릿을 이용하여 광/전자 소자를 성공적으로 제작 및 동작시켰다. 두 번째로, 기존의 InSb 물질을 이용한 벌크 구조의 광 검출기가 가진 파장한계 그리고 저온동작 등의 제약들을 극복하기 위한 연구를 진행하였다. 벌크 구조의 파장 한계를 원적외선 대역까지 늘이기 위한, 3-5족 물질 중 이상적인 물질은 인듐 아세나이드 안티모나이드 (indium arsenide antimonide) 이다. 왜냐하면 InAsxSb1-x는 SWIR 부터 LWIR 의 해당하는 밴드 갭을 가지고 있기 때문이다. 이 물질 기반의 구조와 개발된 공정을 사용하면, 우리는 궁극적으로 자외선부터 원적외선까지의 영역을 벌크 구조만을 사용하여 다중파장 광 검출기를 구현할 수 있게 된다. 따라서, 이 물질의 가능성을 검증하기 위해서, InAs0.81Sb0.19 의 흡수층을 가진 p-i-n 구조 기반의 광 검출기를 GaAs 기판상에서 성장하였다. 고온에서 동작 특성을 향상시키기 위하여, 최적의 InAlSb 배리어를 TCAD로 디자인하였다. 이러한, InAsSb/InAlSb 이종 접합 광 검출기는 분자선 증착 장비를 이용하여 성장되었다. 그 결과로, 우리는 비슷한 Sb 조성을 가진 InAsSb 기반의 광 검출기들 중에서, 처음으로 중적외선 대역의 이종 접합 구조의 광 검출기를 상온 동작 하는 것을 시연하였다. 게다가, 그것은 상용화 된 광 검출기보다 높은 광 응답 특성(15 mA/W)을 보여주었다. 이 상온에서 동작하는 중적외선 광 검출기는 InSb 광 검출기에 사용되는 Dewar 를 제거함으로써, 최종 검출기 시스템의 부피를 감소 시킬 수 있다. 이 실험으로부터, 벌크 구조로 원적외선 대역을 검출하기 위한 InAsSb 물질의 큰 잠재성이 있다는 것을 의미한다. 마지막으로, 벌크 구조의 집적을 통한 다중파장 광 검출기의 실현이 가능한지 확인하기 위해서 모놀리식(monolithic) 집적에 관한 연구를 수행하였다. 확보된 상온 동작이 가능한 가시광선부터 MWIR 검출 파장을 가진 광 검출기들 중에서, 최적의 제작 순서를 확립하기 위해서 물질에 관한 성숙도가 높은 가시광선 GaAs 그리고 근적외선 InGaAs 광 검출기를 사용하였다. 가시광/근적외선 대역의 다중파장 광 검출기를 형성하기 위해서, GaAs 광 검출기를 InGaAs 광 검출기 상으로 개발된 고속 에피택셜 리프트 오프 기법을 사용하여 전사하였다. GaAs 광 검출기와 InGaAs 광 검출기는 off-axis 없이 수직으로 잘 정렬되었음을 x-ray 분광법을 이용하여 확인하였다. 또한, 각각의 광 검출기의 기준 소자들과 비교했을 때 비슷한 암 전류가 나타났다. 마지막으로, 레이저 입사를 통해, 두 개의 광 검출기 대한 광 반응은 물질 특성들에 따라 가시광과 근적외선에서 각각 명확하게 나타났다. 이러한 결과들은 고속 에피택셜 리프트 오프 기법이 높은 픽셀 밀도 및 거의 완벽한 수직 정렬도를 갖는 한 기판상의 벌크 기반의 다중파장 광 검출기를 집적할 수 있다는 것을 의미한다. 미래의 목표하는 응용처에 따라, 원하는 파장들을 갖는 광 검출기를 벌크 구조로 간단하게 성장할 수 있고, 다중파장 이미징 시스템을 제작 할 수 있다.List of Figures i Chapter.1 Introduction 1 1.1 Photodetectors based on III-V compound semiconductors 1 1.2 Imaging applications 4 1.2.1. Single color imaing 4 1.2.2. Multicolor imaing 4 1.2.3. Development trend of photodetectors 5 1.3 Approches for forming multicolor photodectors 9 1.3.1. Epitaxy 9 1.3.2. Heterogeneous integration 17 1.3.3. Summary of each method 21 1.4 Overview of heterogeneous integration technology 23 1.4.1. Introduction 23 1.4.2. Direct bonding 24 1.4.3. Cold-weld bonding 26 1.4.4. Eutectic bonding 26 1.4.5. Adhesive bonding 28 1.4.7. Wafer splitting 31 1.4.8. Epitaxial lift off (ELO) 33 1.4.9. Benchmark of differenct heterogeneous intergration methods 35 1.5 Thesis overview 37 1.6 Bibliography 40 Chapter. 2 Method for heterogeneous integration of III-V compound semiconductors on other substrates 45 2.1 Introduction 45 2.1.1 The origin of low throughput in conventional ELO 46 2.1.2 Previous works for ehancement of ELO throughput 48 2.1.3 Approach: high-throughput ELO process 53 2.1.4 Experimental procedure 55 2.2 Results and discussion 57 2.3 Summary 65 2.4 Biblography 66 Chapter. 3 Verification of thin film devices by using a high throughput heterogeneous integration method 70 3.1 Introduction 70 3.2 Growth of device structures and heterogeneous integration 72 3.2.1. Device structures 72 3.2.2. Wafer bonding and ELO 74 3.3 Y2O3 bonded HEMTs on Si substrate 75 3.3.1 Fabrication process 75 3.3.2. Material characterization of HEMTs on Si 76 3.3.3. Electrical characterization of HEMTs on Si 80 3.3.4. Investigation of wafer reusability by using HEMT structure 83 3.4 Pt/Au bonded optoelectonic devices 86 3.4.1. Fabrication process of solar cells and HPTs on Si 86 3.4.2. Evaluation of Pt/Au metal bonding 88 3.4.3. Characterization of solar cells and HPTs 91 3.5 Estimation of production cost via recycling III-V wafers 95 3.6 Summary 101 3.7 Bibliography 102 Chapter. 4 Design and characterization of III-V based photodtectors 106 4.1 Introduction 106 4.1.1. The potential of Induim arsenide antimonide (InAsSb) 106 4.1.2. Challenges of InAsSb p-i-n PDs for compact detector systems 110 4.2 Barrier layer design and material characterization for growing HJPDs 113 4.2.1. Simulation of an optimum barrier layer for InAs0.8Sb0.2 113 4.2.2. Growth of a high quality InAsSb layer with an AlGaSb buffer layer grown on GaAs substrates 115 4.2.3. Ohmic contact formation with metal species 120 4.2.4. Growth and fabrication of InAsSb based HJPDs 126 4.3 Analysis of electrical and optical characteristics for fabricated PDs 129 4.4 Summary 138 4.5 Bibliography 139 Chapter. 5 Monolithic integration of visible/near-infrared photodetectors 145 5.1 Introduction 145 5.2 Fabrication process and material characterization of multicolor PD 148 5.3 Analysis of the electrical and optical characteristics of the fabricated multicolor PDs 154 5.4 Summary 163 5.5 Bibliography 164 Chapter. 6 Conclusions 169 국 문 초 록 172Docto

Development of advanced technologies for the fabrication of III-V high electron mobility transistors

Over the past 5 years there has been an increase in the number of applications that require devices that operate in the millimetre range (30-300GHz). This demand has driven research into " devices that will operate at frequencies above 100GHz. This performance has been achieved using two main technologies, the Heterojunction Bipolar Transistor (HBT) and the High Electron Mobility Transistor (HEMT). At present it is a HEMT device that holds the record for the highest operating frequency of any transistor. It is this technology that this project concentrates on. In order to fabricate devices that operate at these frequencies two methods are commonly employed. The first is to vary the material of the device, in particular, increasing the indium content of the channel. The second method is to reduce the physical dimensions of the transistors, including reducing the gate length of the device therefore reducing transit time and gate capacitance. Reducing the separation of the source-drain ohmic contacts or employing a self-aligned ohmic strategy reduces the associated parasitic resistances. This project will concentrate on the scaling of the gate length in addition to the reduction of parasitic resistances with the use of self-aligned ohmic contacts.This work includes the realisation of the first self-aligned 120nm T -Gate. GaAs pHEMT fabricated at the University of Glasgow. These devices required the development of two key technologies, the non-annealed ohmic contact and the succinic acid based selective wet etch. The self-aligned devices showed good RF performance with a ft of 150 GHz and a fmax of 180 GHz which compares favourable with results o~ 120nm GaAs pHEMTs previously fabricated at Glasgow. The investigation of gate length scaling to device performance included the development of two lithographic process capable of producing HEMT with a gate length of 50nm and 30nm respectively in addition to a method ~f sample preparation that allows these devices to be analysed using TEM techniques. This work has lead to the realisation of SOnm T -gate metamorphic HEMTs using a PMMAIcopolymer resist stack, these devices displayed an excellent yield, with over 95% of devices working. The uniformity of the gate process was also high with a threshold voltage of - 0.44SV with a standard deviation of O.OOSV. The devices demonstrated an .it of 330GHz and a fmax of 260GHz making these devices some of the fastest transistors that have ever been fabricated on a GaAs substrate. The second lithography process was developed to realise T -gates with a gate length of less than SOnm. This processed used a two stage "bi-lithography" process to minimise the effect of forward s7attering through the resist. The gate footprint was transferred into a Si02 gate by a dry etch process. This lithography process was integrated into a full process flow for lattice matched InP HEMTs Using this process, HEMTs were fabricated with a T-gate of 2Snm. This is the smallest T -gate device that has been fabricated at the University of Glasgow and is comparable with the smallest HEMT devices in the world

A review of technologies and design techniques of millimeter-wave power amplifiers

his article reviews the state-of-the-art millimeter-wave (mm-wave) power amplifiers (PAs), focusing on broadband design techniques. An overview of the main solid-state technologies is provided, including Si, gallium arsenide (GaAs), GaN, and other III-V materials, and both field-effect and bipolar transistors. The most popular broadband design techniques are introduced, before critically comparing through the most relevant design examples found in the scientific literature. Given the wide breadth of applications that are foreseen to exploit the mm-wave spectrum, this contribution will represent a valuable guide for designers who need a single reference before adventuring in the challenging task of the mm-wave PA design

Cryogenic Ultra-Low Noise InP High Electron Mobility Transistors

Indium phosphide high electron mobility transistors (InP HEMTs), are today the best transistors for cryogenic low noise amplifiers at microwave frequencies. Record noise temperatures below 2 K using InP HEMT equipped cryogenic low noise amplifiers (LNAs) were demonstrated already a decade ago. Since then, reported progress in further reducing noise has been slow. This thesis presents new technology optimization, modeling, measurements and circuit implementation for the cryogenic InP HEMT. The findings have been used to demonstrate a new record minimum noise temperature of 1 K at 6 GHz. The thesis considers aspects all the way from material, process and device design, to hybrid and monolithic microwave integrated circuit (MMIC) LNAs. The epitaxial structure has been developed for lower access resistance and improved transport characteristics. By investigating device passivation, metallization, gate recess etch, and circuit integration, low-noise InP HEMT performance was optimized for cryogenic operation. When integrating the InP HEMT in a 4-8 GHz 3-stage hybrid LNA, a noise temperature of 1.2 K was measured at 5.2 GHz and 10 K operating temperature. The extracted minimum noise temperature of the InP HEMT was 1 K at 6 GHz. The low-frequency 1/f noise in the 1 Hz to 1 GHz range and gain fluctuations in the 1Hz to 100 kHz range have been measured for six different types of HEMTs, and compared to two different SiGe heterojunction bipolar transistors (HBTs). The results showed that radiometer chop rates in the kHz range are needed for millimeter wave radiometers with 10 GHz bandwidth. A comparative study of GaAs metamorphic HEMTs (mHEMTs) and InP HEMTs has been performed. When integrated in a 4-8 GHz 3-stage LNA, the InP HEMT LNA exhibited 1.6 K noise temperature whereas the GaAs mHEMT LNA showed 5 K. The observed superior cryogenic noise performance of the InP HEMT compared to the GaAs MHEMT was related to a difference in quality of pinch-off as observed in I-V characteristics at 300 K and 10 K. To demonstrate the low noise performance of the InP HEMT technology, a 0.5-13 GHz and a 24-40 GHz cryogenic monolithic microwave integrated circuit (MMIC) LNA was fabricated. Both designs showed state-of-the-art low noise performance, promising for future radio astronomy receivers such as the square kilometer array

GaN-based HEMTs for Cryogenic Low-Noise Applications

Radio-astronomy deals with signals and radiations of extremely weak intensity. Also, it requires robust and rugged technologies able to sustain and prevent the Radio Frequency Interferences (RFI). Complying with the required high sensitivity, Low Noise Amplifiers (LNAs) operating at cryogenic temperatures are key elements in radio astronomy instrumentation. Thus far, advanced semiconductor technologies but with limited power-handling capabilities have been traditionally employed as LNAs. Over the past decades, Gallium Nitride (GaN)-based high electron mobility transistors (HEMTs) were demonstrated at room temperature to offer a combination of both excellent low-noise operation and a superior high-power handling performance compared to other materials. In addition, a number of studies indicated a promising potential for the GaN technology to operate at cryogenic temperatures. However, the cryogenic noise performance of the GaN-HEMTs remained unexplored so far.This thesis investigates the potential of GaN–based HEMTs for low-noise operation at these cryogenic temperatures. Established characterization and modeling approaches were employed for this purpose. As a main result, this work reveals a first estimation of the noise performance of GaN-HEMTs at cryogenic temperatures of ~10 K which compares to other more advanced technologies in this field. This was achieved through the extraction of a model, based on experimental noise measurements, describing the microwave noise behavior at cryogenic temperatures at the device level. The model predicts the noise contribution of GaN-HEMTs at cryogenic temperatures with respect to the frequency of operation, the dissipated power, and the total periphery of the device. Hence, it constitutes the basis for the design of future GaN-based LNAs which fulfill the different requirements set by the demanding cryogenic applications.The extracted cryogenic noise model was used to identify and analyze the role of the different physical parameters of the device, over which a technological control might be possible in the future in order to improve the assessed noise performance of the cryogenic GaN-HEMTs. From that perspective, GaN-HEMTs featuring superconducting Niobium (Nb)-gates were demonstrated for the first time. The successful integration of superconducting Nb-gates into AlGaN/GaN HEMTs was demonstrated on different samples, showing a suppression of the gate resistance independently of the width and length of the gate below a critical temperature \u1d447\u1d450 < 9.2 K. The superconductivity of the gate leads to the cancellation of the associated noise contribution. Comparing the noise performance of the resulting devices to that of the conventional Gold (Au)-gated GaN-HEMTs, it was concluded that further management of the device’s self-heating is required to enable the full potential of the Nb-gate by maintaining its superconductivity while operating at optimum-noise bias conditions