Real-time Avionics Optimization

We report on the solution of a difficult optimization problem which arises in avionics industry. When constructing the on-board controlling-network of an airplane, the engineers need to solve a computationally highly complex problem. The goal is to assign periodic tasks to the processors on the plane and define a schedule for each processor. Current state-of-the-art approaches to tackle the problem are by far not powerful enough to solve instances of real-world size. With the help of the powerful algorithm engineering paradigm we analyzed the mathematical properties of the scheduling problem and designed sophisticated software based on the structural insights. We were able to design a model that outperformed current state-of-the-art approaches by several orders of magnitude. In particular, we could solve industrial size real-world instances to optimality. Our methods lead, for the first time, to an industrial strength tool to schedule aircraft sized instance

A MDE-based optimisation process for Real-Time systems

The design and implementation of Real-Time Embedded Systems is now heavily relying on Model-Driven Engineering (MDE) as a central place to define and then analyze or implement a system. MDE toolchains are taking a key role as to gather most of functional and not functional properties in a central framework, and then exploit this information. Such toolchain is based on both 1) a modeling notation, and 2) companion tools to transform or analyse models. In this paper, we present a MDE-based process for system optimisation based on an architectural description. We first define a generic evaluation pipeline, define a library of elementary transformations and then shows how to use it through Domain-Specific Language to evaluate and then transform models. We illustrate this process on an AADL case study modeling a Generic Avionics Platform

NoCo: ILP-based worst-case contention estimation for mesh real-time manycores

Manycores are capable of providing the computational demands required by functionally-advanced critical applications in domains such as automotive and avionics. In manycores a network-on-chip (NoC) provides access to shared caches and memories and hence concentrates most of the contention that tasks suffer, with effects on the worst-case contention delay (WCD) of packets and tasks' WCET. While several proposals minimize the impact of individual NoC parameters on WCD, e.g. mapping and routing, there are strong dependences among these NoC parameters. Hence, finding the optimal NoC configurations requires optimizing all parameters simultaneously, which represents a multidimensional optimization problem. In this paper we propose NoCo, a novel approach that combines ILP and stochastic optimization to find NoC configurations in terms of packet routing, application mapping, and arbitration weight allocation. Our results show that NoCo improves other techniques that optimize a subset of NoC parameters.This work has been partially supported by the Spanish Ministry of Economy and Competitiveness under grant TIN2015- 65316-P and the HiPEAC Network of Excellence. It also received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (agreement No. 772773). Carles Hernández is jointly supported by the MINECO and FEDER funds through grant TIN2014-60404-JIN. Jaume Abella has been partially supported by the Spanish Ministry of Economy and Competitiveness under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717. Enrico Mezzetti has been partially supported by the Spanish Ministry of Economy and Competitiveness under Juan de la Cierva-Incorporaci´on postdoctoral fellowship number IJCI-2016-27396.Peer ReviewedPostprint (author's final draft

Design of Energy-efficient Hierarchical Scheduling for Integrated Modular Avionics Systems

AbstractRecently the integrated modular avionics (IMA) architecture which introduces the concept of resource partitions becomes popular as an alternative to the traditional federated architecture. This study investigates the problem of designing hierarchical scheduling for IMA systems. The proposed scheduler model enables strong temporal partitioning, so that multiple hard real-time applications can be easily integrated into an uniprocessor platform. This paper derives the mathematic relationships among partition cycle, partition capacity and schedulability under the real-time condition, and then proposes an algorithm for optimizing partition parameters. Real-time tasks with arbitrary deadlines are considered for generality. To further improve the basic algorithm and reduce the energy consumption for embedded systems in aircraft, a power optimization approach is also proposed by exploiting the slack time. Experimental results show that the designed system can guarantee the hard real-time requirement and reduce the power consumption by at least 14%

Using network calculus to optimize the AFDX network

This paper presents quantitative results we obtained when optimizing the setting of priorities of the AFDX traffic flows, with the objective to obtain tighter latency and queue-size deterministic bounds (those bounds are calculated by our Network Calculus tool). We first point out the fact that setting randomly the priorities gives worse bounds than using no priorities, and we then show experiments on the basis of classic optimization techniques such as a descent method and a tentative AlphaBetaassisted brute-force approach: both of them haven’t brought significantly better results. We finally present experiments based on genetic algorithms, and we show how driving these algorithms in an adequate way has allowed us to deliver a full range of priority configurations that bring tighter bounds and allow the network traffic designer to trade off average gains of 40% on all the latency bounds against focused improvement on the largest queue-size bound (up to a 30% reduction)

Performance analysis of a Master/Slave switched Ethernet for military embedded applications

Current military communication network is a generation old and is no longer effective in meeting the emerging requirements imposed by the next generation military embedded applications. A new communication network based upon Full Duplex Switched Ethernet is proposed in this paper to overcome these limitations. To allow existing military subsystems to be easily supported by a Switched Ethernet network, our proposal consists in keeping their current centralized communication scheme by using an optimized master/slave transmission control on Switched Ethernet thanks to the Flexible Time Triggered (FTT) paradigm. Our main objective is to assess the performance of such a proposal and estimate the quality of service we can expect in terms of latency. Using the Network Calculus formalism, schedulability analysis are determined. These analysis are illustrated in the case of a realistic military embedded application extracted from a real military aircraft network, to highlight the proposal's ability to support the required time constrained communications

Opportunities for aircraft controls research

Several problems which drive aircraft control technology are discussed. Highly unstable vehicles, flutter speed boundary expansion, and low level automated flight that follows terrain are discussed

Exploring Alternatives to use Master/Slave Full Duplex Switched Ethernet for Avionics Embedded Applications

The complexity of distributed real-time systems, including military embedded applications, is increasing due to an increasing number of nodes, their functionality and higher amounts of exchanged data. This higher complexity imposes major development challenges when nonfunctional properties must be enforced. On the other hand, the current military communication networks are a generation old and are no longer effective in facing such increasingly complex requirements. A new communication network, based on Full Duplex Switched Ethernet and Master/slave approach, has been proposed previously. However, this initial approach is not efficient in terms of network bandwidth utilization. In this paper we propose two new alternative approaches that can use the network bandwidth more efficiently. In addition we provide a preliminary qualitative assessment of the three approaches concerning different factors such as performance, scalability, complexity and flexibility

Modeling and characterization of VCSEL-based avionics full-duplex ethernet (AFDX) gigabit links

Low cost and intrinsic performances of 850 nm Vertical Cavity Surface Emitting Lasers (VCSELs) compared to Light Emitting Diodes make them very attractive for high speed and short distances data communication links through optical fibers. Weight saving and Electromagnetic Interference withstanding requirements have led to the need of a reliable solution to improve existing avionics high speed buses (e.g. AFDX) up to 1Gbps over 100m. To predict and optimize the performance of the link, the physical behavior of the VCSEL must be well understood. First, a theoretical study is performed through the rate equations adapted to VCSEL in large signal modulation. Averaged turn-on delays and oscillation effects are analytically computed and analyzed for different values of the on - and off state currents. This will affect the eye pattern, timing jitter and Bit Error Rate (BER) of the signal that must remain within IEEE 802.3 standard limits. In particular, the off-state current is minimized below the threshold to allow the highest possible Extinction Ratio. At this level, the spontaneous emission is dominating and leads to significant turn-on delay, turn-on jitter and bit pattern effects. Also, the transverse multimode behavior of VCSELs, caused by Spatial Hole Burning leads to some dispersion in the fiber and degradation of BER. VCSEL to Multimode Fiber coupling model is provided for prediction and optimization of modal dispersion. Lastly, turn-on delay measurements are performed on a real mock-up and results are compared with calculations

Neural network based architectures for aerospace applications

A brief history of the field of neural networks research is given and some simple concepts are described. In addition, some neural network based avionics research and development programs are reviewed. The need for the United States Air Force and NASA to assume a leadership role in supporting this technology is stressed