12,597 research outputs found
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Improved Physical Design for Manufacturing Awareness and Advanced VLSI
Increasing challenges arise with each new semiconductor technology node, especially in advanced nodes, where the industry tries to extract every ounce of benefit as it approaches the limits of physics, through manufacturing-aware design technology co-optimization and design-based equivalent scaling. The increasing complexity of design and process technologies, and ever-more complex design rules, also become hurdles for academic researchers, separating academic researchers from the most up-to-date technical issues.This thesis presents innovative methodologies and optimizations to address the above challenges. There are three directions in this thesis: (i) manufacturing-aware design technology co-optimization; (ii) advanced node design-based equivalent scaling; and (iii) an open source academic detailed routing flow.To realize manufacturing-aware design technology co-optimization, this thesis presents two works: (i) a multi-row detailed placement optimization for neighbor diffusion effect mitigation between neighboring standard cells; and (ii) a post-routing optimization to generate 2D block mask layout for dummy segment removal in self-aligned multiple patterning.To achieve advanced node design-based equivalent scaling, this thesis presents two improved physical design methodologies: (i) a post-placement flop tray generation approach for clock power reduction; and (ii) a detailed placement approach to exploit inter-row M1 routing for congestion and wirelength reduction.To address the increasing gap between academia and industry, this thesis presents two works toward an open source academic detailed routing flow: (i) a complete, robust, scalable and design ruleaware dynamic programming-based pin access analysis framework; and (ii) TritonRoute – the open source detailed router that is capable of delivering DRC-clean detailed routing solutions in advanced nodes.This thesis concludes with a summary of its contributions and open directions for future research
Survey of Inter-satellite Communication for Small Satellite Systems: Physical Layer to Network Layer View
Small satellite systems enable whole new class of missions for navigation,
communications, remote sensing and scientific research for both civilian and
military purposes. As individual spacecraft are limited by the size, mass and
power constraints, mass-produced small satellites in large constellations or
clusters could be useful in many science missions such as gravity mapping,
tracking of forest fires, finding water resources, etc. Constellation of
satellites provide improved spatial and temporal resolution of the target.
Small satellite constellations contribute innovative applications by replacing
a single asset with several very capable spacecraft which opens the door to new
applications. With increasing levels of autonomy, there will be a need for
remote communication networks to enable communication between spacecraft. These
space based networks will need to configure and maintain dynamic routes, manage
intermediate nodes, and reconfigure themselves to achieve mission objectives.
Hence, inter-satellite communication is a key aspect when satellites fly in
formation. In this paper, we present the various researches being conducted in
the small satellite community for implementing inter-satellite communications
based on the Open System Interconnection (OSI) model. This paper also reviews
the various design parameters applicable to the first three layers of the OSI
model, i.e., physical, data link and network layer. Based on the survey, we
also present a comprehensive list of design parameters useful for achieving
inter-satellite communications for multiple small satellite missions. Specific
topics include proposed solutions for some of the challenges faced by small
satellite systems, enabling operations using a network of small satellites, and
some examples of small satellite missions involving formation flying aspects.Comment: 51 pages, 21 Figures, 11 Tables, accepted in IEEE Communications
Surveys and Tutorial
Small-world networks, distributed hash tables and the e-resource discovery problem
Resource discovery is one of the most important underpinning problems behind producing a scalable,
robust and efficient global infrastructure for e-Science. A number of approaches to the resource discovery
and management problem have been made in various computational grid environments and prototypes
over the last decade. Computational resources and services in modern grid and cloud environments can be
modelled as an overlay network superposed on the physical network structure of the Internet and World
Wide Web. We discuss some of the main approaches to resource discovery in the context of the general
properties of such an overlay network. We present some performance data and predicted properties based
on algorithmic approaches such as distributed hash table resource discovery and management. We describe
a prototype system and use its model to explore some of the known key graph aspects of the global
resource overlay network - including small-world and scale-free properties
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Layer assignment and routing optimization for advanced technologies
As VLSI technology scales to deep sub-micron and beyond, it becomes
increasingly challenging to achieve timing closure for VLSI design. Since a
complete design flow consists of several phases, such as logic synthesis, placement, and routing, interconnect synthesis plays an important role which includes buffer insertion/sizing and timing-driven routing. Although progress has been achieved by many advanced routing techniques, the following aspects
can be exploited sufficiently for further improvement: (1) incremental layer assignment for timing optimization; (2) signal routing with the requirement of regularity; (3) power-efficient optical-electrical interconnect paradigm. Thus, to perform the layer assignment and routing optimization for advanced technologies,
an automated routing engine in a global view is essential to benefit the interconnect design while satisfying specific requirements.
This dissertation proposes a set of algorithms and methodology on layer
assignment and routing optimization for advanced technologies. The research includes two timing-driven incremental layer assignment approaches, synergistic
topology generation and routing synthesis for signal groups, and optical-electrical routing design for power efficiency.
For incremental layer assignment, most of the conventional approaches
target via minimization but neglect the timing issues. Meanwhile, via delays
are ignored but should be considered in emerging technology nodes. Then two
timing-driven incremental layer assignment frameworks are proposed, where all the nets are solved simultaneously with the integration of via delays: (1) optimization of the total sum of net delays and reduction of slew violations; (2) minimization of critical path timing in selected nets.
For on-chip signal routing, the bundled bits in one group may have different
pin locations, but they have to be routed in a regular manner by sharing common topologies. Very few previous works target inter-bit regularity via multi-layer topology selection. Furthermore, the routability and wire-length of the signal bits should also be optimized. Then an advanced synergistic routing engine is promoted, which is able to not only control routability and wire-length but also guide each bit routing intelligently for design regularity.
For optical-electrical co-design routing, optical interconnect shows its
advantage due to the dominance of bandwidth-distance-power properties. The previous works lack a detailed exploration of optical-electrical co-design for on-chip interconnects. During the transmission, signal quality can be affected by various loss sources and Electrical to Optical (EO)/Optical to Electrical (OE) conversion overheads should also be considered. Then a power-efficient routing flow for on-chip signals is presented, where optical connections can collaborate with electrical wires seamlessly.
The effectiveness of proposed algorithms and techniques is demonstrated in this dissertation. These approaches are able to achieve the improvements regarding specific metrics and eventually benefit the routing flow.Electrical and Computer Engineerin
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