Reconfigurable three-terminal logic devices using phase-change materials

Conventional solid-state and mass storage memories (such as SRAM, DRAM and the hard disk drive HDD) are facing many technological challenges to meet the ever-increasing demand for fast, low power and cheap data storage solutions. This is compounded by the current conventional computer architectures (such as the von Neumann architecture) with separate processing and storage functionalities and hence data transfer bottlenecks and increased silicon footprint. Beyond the von Neumann computer architecture, the combination of arithmetic-logic processing and (collocally) storage circuits provide a new and promising alternative for computer systems that overcome the many limitations of current technology. However, there are many technical challenges that face the implementation of universal blocks of both logic and memory functions using conventional silicon technology (transistor-transistor logic - TTL, and complementary metal oxide semiconductors - CMOS). Phase-change materials, such as Ge2Sb2Te5 (GST), provide a potential complement or replacement to these technologies to provide both processing and, collocally, storage capability. Existing research in phase-change memory technologies focused on two-terminal non-volatile devices for different memory and logic applications due to their ability to achieve logic-resistive switching in nanosecond time scale, their scalability down to few nanometer-scale cells, and low power requirements. To perform logic functionality, current two-terminal phase-change logic devices need to be connected in series or parallel circuits, and require sequential inputs to perform the required logic function (such as NAND and NOR). In this research programme, three-terminal (3T) non-volatile phase-change memories are proposed and investigated as potential alternative logic cells with simultaneous inputs as reconfigurable, non-volatile logic devices. A vertical 3T logic device structure is proposed in this work based on existing phase-change based memory cell architecture and original concept work by Ovshinsky. A comprehensive, multi-physics finite-element model of the vertical 3T device was constructed in Comsol Multiphysics. This model solves Laplace's equation for the electric potential due to the application of voltage sources. The calculated electric potential and fields provide the Joule heating source in the device, which is used to compute the temperature distribution through solution of the heat diffusion equation, which is necessary to activate the thermally-driven phase transition process. The physically realistic and computationally efficient nucleation- growth model was numerically implemented to model the phase change and resistance change in the Ge2Sb2Te5 (GST) phase-change material in the device, which is combined with the finite- element model using the Matlab programming interface. The changes in electrical and thermal conductivities in the GST region are taken into account following the thermally activated phase transformations between the amorphous-crystalline states using effective medium theory. To determine the appropriate voltage and temperature conditions for the SET and RESET operations, and to optimise the materials and thicknesses of the thermal and heating layers in the device, comprehensive steady-state parametric simulations were carried out using the finite-element multi-physics model. Simulations of transient cycles of writing (SET) and erasing (RESET) processes using appropriate voltage pulses were then carried out on the designed vertical 3T device to study the phase transformations for practical reconfigurable logic operations. The simulations indicated excellent resistance contrast between the logic 1 and 0 states, and successfully demonstrated the feasibility of programming the logic functions of NAND and NOR gates using this 3T configuration

Origin of multi-level switching and telegraphic noise in organic nanocomposite memory devices.

The origin of negative differential resistance (NDR) and its derivative intermediate resistive states (IRSs) of nanocomposite memory systems have not been clearly analyzed for the past decade. To address this issue, we investigate the current fluctuations of organic nanocomposite memory devices with NDR and the IRSs under various temperature conditions. The 1/f noise scaling behaviors at various temperature conditions in the IRSs and telegraphic noise in NDR indicate the localized current pathways in the organic nanocomposite layers for each IRS. The clearly observed telegraphic noise with a long characteristic time in NDR at low temperature indicates that the localized current pathways for the IRSs are attributed to trapping/de-trapping at the deep trap levels in NDR. This study will be useful for the development and tuning of multi-bit storable organic nanocomposite memory device systems

Device-Level Photonic Memories and Logic Applications Using Phase-Change Materials

This is the final version of the article. Available from Wiley via the DOI in this record.All data need to evaluate the conclusions in this Communication are present in this Communication and/or the Supporting Information. Additional data related to this Communication may be requested from the corresponding author (H.B.; [email protected] or Oxford Research Archive for Data (https://ora.ox.ac.uk).Inspired by the great success of fiber optics in ultrafast data transmission, photonic computing is being extensively studied as an alternative to replace or hybridize electronic computers, which are reaching speed and bandwidth limitations. Mimicking and implementing basic computing elements on photonic devices is a first and essential step toward all-optical computers. Here, an optical pulse-width modulation (PWM) switching of phase-change materials on an integrated waveguide is developed, which allows practical implementation of photonic memories and logic devices. It is established that PWM with low peak power is very effective for recrystallization of phase-change materials, in terms of both energy efficiency and process control. Using this understanding, multilevel photonic memories with complete random accessibility are then implemented. Finally, programmable optical logic devices are demonstrated conceptually and experimentally, with logic "OR" and "NAND" achieved on just a single integrated photonic phase-change cell. This study provides a practical and elegant technique to optically program photonic phase-change devices for computing applications.This research was supported via the Engineering and Physical Sciences Research Council Manufacturing Fellowships (EP/J018694/1), the Wearable and Flexible Technologies (WAFT) collaboration (EP/M015173/1), the Chalcogenide Advanced Manufacturing Partnership (EP/M015130/1), and the European Union's Horizon 2020 research and innovation program (780848, Fun‐COMP project)

From biomaterial-based data storage to bio-inspired artificial synapse

The implementation of biocompatible and biodegradable information storage would be a significant step toward next-generation green electronics. On the other hand, benefiting from high density, multifunction, low power consumption and multilevel data storage, artificial synapses exhibit attractive future for built-in nonvolatile memories and reconstructed logic operations. Here, we provide a comprehensive and critical review on the developments of bio-memories with a view to inspire more intriguing ideas on this area that may finally open up a new chapter in next-generation consumer electronics. We will discuss that biomolecule-based memory employed evolutionary natural biomaterials as data storage node and artificial synapse emulated biological synapse function, which is expected to conquer the bottleneck of the traditional von Neumann architecture. Finally, challenges and opportunities in the aforementioned bio-memory area are presented