Impact of gamma-ray irradiation on dynamic characteristics of Si and SiC power MOSFETs

Power electronic devices in spacecraft and military applications requires high radiation tolerant. The semiconductor devices face the issue of device degradation due to their sensitivity to radiation. Power MOSFET is one of the primary components of these power electronic devices because of its capabilities of fast switching speed and low power consumption. These abilities are challenged by ionizing radiation which damages the devices by inducing charge built-up in the sensitive oxide layer of power MOSFET. Radiations degrade the oxides in a power MOSFET through Total Ionization Dose effect mechanism that creates defects by generation of excessive electron–hole pairs causing electrical characteristics shifts. This study investigates the impact of gamma ray irradiation on dynamic characteristics of silicon and silicon carbide power MOSFET. The switching speed is limit at the higher doses due to the increase capacitance in power MOSFETs. Thus, the power circuit may operate improper due to the switching speed has changed by increasing or decreasing capacitances in power MOSFETs. These defects are obtained due to the penetration of Cobalt60 gamma ray dose level from 50krad to 600krad. The irradiated devices were evaluated through its shifts in the capacitance-voltage characteristics, results were analyzed and plotted for the both silicon and silicon carbide power MOSFET

The impact of repetitive unclamped inductive switching on the electrical parameters of low-voltage trench power nMOSFETs

The impact of hot-carrier injection (HCI) due to repetitive unclamped inductive switching (UIS) on the electrical performance of low-voltage trench power n-type MOSFETs (nMOSFETs) is assessed. Trench power nMOSFETs with 20- and 30-V breakdown voltage ratings in TO-220 packages have been fabricated and subjected to over 100 million cycles of repetitive UIS with different avalanche currents IAV at a mounting base temperature TMB of 150°C. Impact ionization during avalanche conduction in the channel causes hot-hole injection into the gate dielectric, which results in a reduction of the threshold voltage VGSTX, as the number of avalanche cycles N increases. The experimental data reveal a power-law relationship between the change in the threshold voltage ΔVGSTX and N. The results show that the power-law prefactor is directly proportional to the avalanche current. After 100 million cycles, it was observed in the 20-V rated MOSFETs that the power-law prefactor increased by 30% when IAV was increased from 160 to 225 A, thereby approximating a linear relationship. A stable subthreshold slope with avalanche cycling indicates that interface trap generation may not be an active degradation mechanism. The impact of the cell pitch on avalanche ruggedness is also investigated by testing 2.5- and 4- m cell-pitch 30-V rated MOSFETs. Measurements showed that the power-law prefactor reduced by 40% when the cell pitch was reduced by 37.5%. The improved VGSTX stability with the smaller cell-pitch MOSFETs is attributed to a lower avalanche current per unit cell resulting in less hot-hole injection and, hence, smaller VGSTX shift. The 2.5-m cell-pitch MOSFETs also show 25% improved on -state resistance RDSON, better RDSON stability, and 20% less subthreshold slope compared with the 4-m cell-pitch MOSFETs, although with 100% higher initial IDSS and less IDSS stability with avalanche cycling. These results are important for manufacturers of automotive MOSFETs where multiple avalanche occurrences over the lifetime of the MOSFET are expected

A magnetically isolated gate driver for high-speed voltage sharing in series-connected MOSFETs

A scalable resonant gate drive circuit is described, suitable for driving series-connected MOSFETs in high-voltage, high-speed inverter applications for resistive and capacitive loads. Galvanic isolation is provided by a loop of high voltage wire, which also serves as the resonant inductor in the circuit. Fast dynamic voltage sharing is achieved by delivering equal current to each gate. A prototype is built and tested, demonstrating a 75ns switching time at 5kV using 900V MOSFETs

An Integrated Circuit Compatible Compact Package for Thermal Gas Flowmeters

An original packaging method suitable for integrated thermal mass flow sensors is presented. The method consists in the application of a plastic transparent adapter to the chip surface. The adapter is sealed to the chip surface by means of a thermal procedure. By this approach it is possible to selectively convey the fluid flow to reduced chip areas, avoiding contact with the pads. Fabrication and testing of a very compact flow sensor is described.Comment: Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/EDA-Publishing

An Intelligent Auxiliary Vacuum Brake System

The purpose of this paper focuses on designing an intelligent, compact, reliable, and robust auxiliary vacuum brake system (VBS) with Kalman filter and self-diagnosis scheme. All of the circuit elements in the designed system are integrated into one programmable system-on-chip (PSoC) with entire computational algorithms implemented by software. In this system, three main goals are achieved: (a) Kalman filter and hysteresis controller algorithms are employed within PSoC chip by software to surpass the noises and disturbances from hostile surrounding in a vehicle. (b) Self-diagnosis scheme is employed to identify any breakdown element of the auxiliary vacuum brake system. (c) Power MOSFET is utilized to implement PWM pump control and compared with relay control. More accurate vacuum pressure control has been accomplished as well as power energy saving. In the end, a prototype has been built and tested to confirm all of the performances claimed above

Investigation of FACTS devices to improve power quality in distribution networks

Flexible AC transmission system (FACTS) technologies are power electronic solutions that improve power transmission through enhanced power transfer volume and stability, and resolve quality and reliability issues in distribution networks carrying sensitive equipment and non-linear loads. The use of FACTS in distribution systems is still in its infancy. Voltages and power ratings in distribution networks are at a level where realistic FACTS devices can be deployed. Efficient power converters and therefore loss minimisation are crucial prerequisites for deployment of FACTS devices. This thesis investigates high power semiconductor device losses in detail. Analytical closed form equations are developed for conduction loss in power devices as a function of device ratings and operating conditions. These formulae have been shown to predict losses very accurately, in line with manufacturer data. The developed formulae enable circuit designers to quickly estimate circuit losses and determine the sensitivity of those losses to device voltage and current ratings, and thus select the optimal semiconductor device for a specific application. It is shown that in the case of majority carrier devices (such as power MOSFETs), the conduction power loss (at rated current) increases linearly in relation to the varying rated current (at constant blocking voltage), but is a square root of the variable blocking voltage when rated current is fixed. For minority carrier devices (such as a pin diode or IGBT), a similar relationship is observed for varying current, however where the blocking voltage is altered, power losses are derived as a square root with an offset (from the origin). Finally, this thesis conducts a power loss-oriented evaluation of cascade type multilevel converters suited to reactive power compensation in 11kV and 33kV systems. The cascade cell converter is constructed from a series arrangement of cell modules. Two prospective structures of cascade type converters were compared as a case study: the traditional type which uses equal-sized cells in its chain, and a second with a ternary relationship between its dc-link voltages. Modelling (at 81 and 27 levels) was carried out under steady state conditions, with simplified models based on the switching function and using standard circuit simulators. A detailed survey of non punch through (NPT) and punch through (PT) IGBTs was completed for the purpose of designing the two cascaded converters. Results show that conduction losses are dominant in both types of converters in NPT and PT IGBTs for 11kV and 33kV systems. The equal-sized converter is only likely to be useful in one case (27-levels in the 33kV system). The ternary-sequence converter produces lower losses in all other cases, and this is especially noticeable for the 81-level converter operating in an 11kV network

Implementation of Design Changes Towards a More Reliable, Hands-off Magnetron Ion Source

As the main $H^{-}$ ion source for the accelerator complex, magnetron ion sources have been used at Fermilab since the 1970s. At the offline test stand, new R&D is carried out to develop and upgrade the present magnetron-type sources of $H^{-}$ ions of up to 80 mA and 35 keV beam energy in the context of the Proton Improvement Plan. The aim of this plan is to provide high-power proton beams for the experiments at FNAL. In order to reduce the amount of tuning and monitoring of these ion sources, a new electronic system consisting of a current-regulated arc discharge modulator allow the ion source to run at a constant arc current for improved beam output and operation. A solenoid-type gas valve feeds $H_{2}$ gas into the source precisely and independently of ambient temperature. This summary will cover several studies and design changes that have been tested and will eventually be implemented on the operational magnetron sources at Fermilab. Innovative results for this type of ion source include cathode geometries, solenoid gas valves, current controlled arc pulser, cesium boiler redesign, gas mixtures of hydrogen and nitrogen, and duty factor reduction, with the aim to improve source lifetime, stability, and reducing the amount of tuning needed. In this summary, I will highlight the advances made in ion sources at Fermilab and will outline the directions of the continuing R&D effort.Comment: 4 pp. arXiv admin note: substantial text overlap with arXiv:1701.0175

A new vertical power MOSFET with extremely reduced on resistance and high switching speed with multilayer structure

A vertical power MOSFET’s whose n-drift region is stacked by alternate pn structure named as MULTILAYER POWER MOSFET has been proposed for high voltage application with extremely low on-resistance. However, the device capacitance increases by a significant amount that has the possibility to reduce the switching speed of the devices. Therefore, a trade off is established to reduce RC time constant by changing the thickness of the stacking. The electrical characteristics of a CONVENTIONAL POWER MOSFET having trench contact for the source and body regions are compared with that of our proposed multilayer structure. The device proves itself as a high performance MOSFET with high speed and high storage capacity