12 research outputs found

    Comparison of the Bi-Directional Performance of Micro-Channel Sieve and Thin-Film TIME Peripheral Nerve Interfaces

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    Sophisticated motorized prosthetic limbs contain multiple degrees of freedom of motion as well as embedded pressure and angle transducers to provide sensory feedback in amputees. Although several central neural recording and stimulation modalities exist for both controlling these motions and providing sensory feedback from a prosthetic limb, directly interfacing the peripheral nerves which originally innervated the limb has many advantages. A difficulty with this bi-directional approach is that electrically stimulating axons to provide haptic feedback creates stimulation artifacts at neighboring recording sites within the nerve that are several orders of magnitude larger than the electroneurogram used for control. In this dissertation, a novel micro-channel sieve electrode is designed, optimized and tested that can provide true bi-directional and concurrent electrical stimulation to sensory axons while simultaneously recording high-fidelity electroneurograms from motor axons in the same peripheral nerve. This research, through computational modeling, compares the concurrent bi-directional performance of both the novel micro-channel sieve electrode designed in this dissertation and the gold standard intrafascicular electrode (tfTIME) used in current clinical research studies in human amputees. The novel micro-channel sieve electrode was found to significantly outperform the tfTIME electrode by increasing recording levels and decreasing stimulation artifact yielding a signal to artifact ratio greater than 50 dB compared to -56.4 dB for the tfTIME. The novel micro-channel sieve electrode developed in this dissertation could provide the first concurrentl, bi-directional peripheral nerve interface for clinical applications

    Bidirectional Neural Interface Circuits with On-Chip Stimulation Artifact Reduction Schemes

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    Bidirectional neural interfaces are tools designed to “communicate” with the brain via recording and modulation of neuronal activity. The bidirectional interface systems have been adopted for many applications. Neuroscientists employ them to map neuronal circuits through precise stimulation and recording. Medical doctors deploy them as adaptable medical devices which control therapeutic stimulation parameters based on monitoring real-time neural activity. Brain-machine-interface (BMI) researchers use neural interfaces to bypass the nervous system and directly control neuroprosthetics or brain-computer-interface (BCI) spellers. In bidirectional interfaces, the implantable transducers as well as the corresponding electronic circuits and systems face several challenges. A high channel count, low power consumption, and reduced system size are desirable for potential chronic deployment and wider applicability. Moreover, a neural interface designed for robust closed-loop operation requires the mitigation of stimulation artifacts which corrupt the recorded signals. This dissertation introduces several techniques targeting low power consumption, small size, and reduction of stimulation artifacts. These techniques are implemented for extracellular electrophysiological recording and two stimulation modalities: direct current stimulation for closed-loop control of seizure detection/quench and optical stimulation for optogenetic studies. While the two modalities differ in their mechanisms, hardware implementation, and applications, they share many crucial system-level challenges. The first method aims at solving the critical issue of stimulation artifacts saturating the preamplifier in the recording front-end. To prevent saturation, a novel mixed-signal stimulation artifact cancellation circuit is devised to subtract the artifact before amplification and maintain the standard input range of a power-hungry preamplifier. Additional novel techniques have been also implemented to lower the noise and power consumption. A common average referencing (CAR) front-end circuit eliminates the cross-channel common mode noise by averaging and subtracting it in analog domain. A range-adapting SAR ADC saves additional power by eliminating unnecessary conversion cycles when the input signal is small. Measurements of an integrated circuit (IC) prototype demonstrate the attenuation of stimulation artifacts by up to 42 dB and cross-channel noise suppression by up to 39.8 dB. The power consumption per channel is maintained at 330 nW, while the area per channel is only 0.17 mm2. The second system implements a compact headstage for closed-loop optogenetic stimulation and electrophysiological recording. This design targets a miniaturized form factor, high channel count, and high-precision stimulation control suitable for rodent in-vivo optogenetic studies. Monolithically integrated optoelectrodes (which include 12 µLEDs for optical stimulation and 12 electrical recording sites) are combined with an off-the-shelf recording IC and a custom-designed high-precision LED driver. 32 recording and 12 stimulation channels can be individually accessed and controlled on a small headstage with dimensions of 2.16 x 2.38 x 0.35 cm and mass of 1.9 g. A third system prototype improves the optogenetic headstage prototype by furthering system integration and improving power efficiency facilitating wireless operation. The custom application-specific integrated circuit (ASIC) combines recording and stimulation channels with a power management unit, allowing the system to be powered by an ultra-light Li-ion battery. Additionally, the µLED drivers include a high-resolution arbitrary waveform generation mode for shaping of µLED current pulses to preemptively reduce artifacts. A prototype IC occupies 7.66 mm2, consumes 3.04 mW under typical operating conditions, and the optical pulse shaping scheme can attenuate stimulation artifacts by up to 3x with a Gaussian-rise pulse rise time under 1 ms.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/147674/1/mendrela_1.pd

    Enhancing selectivity of minimally invasive peripheral nerve interfaces using combined stimulation and high frequency block: from design to application

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    The discovery of the excitable property of nerves was a fundamental step forward in our knowledge of the nervous system and our ability to interact with it. As the injection of charge into tissue can drive its artificial activation, devices have been conceived that can serve healthcare by substituting the input or output of the peripheral nervous system when damage or disease has rendered it inaccessible or its action pathological. Applications are far-ranging and transformational as can be attested by the success of neuroprosthetics such as the cochlear implant. However, the body’s immune response to invasive implants have prevented the use of more selective interfaces, leading to therapy side-effects and off-target activation. The inherent tradeoff between the selectivity and invasiveness of neural interfaces, and the consequences thereof, is still a defining problem for the field. More recently, continued research into how nervous tissue responds to stimulation has led to the discovery of High Frequency Alternating Current (HFAC) block as a stimulation method with inhibitory effects for nerve conduction. While leveraging the structure of the peripheral nervous system, this neuromodulation technique could be a key component in efforts to improve the selectivity-invasiveness tradeoff and provide more effective neuroprosthetic therapy while retaining the safety and reliability of minimally invasive neural interfaces. This thesis describes work investigating the use of HFAC block to improve the selectivity of peripheral nerve interfaces, towards applications such as bladder control or vagus nerve stimulation where selective peripheral nerve interfaces cannot be used, and yet there is an unmet need for more selectivity from stimulation-based therapy. An overview of the underlying neuroanatomy and electrophysiology of the peripheral nervous system combined with a review of existing electrode interfaces and electrochemistry will serve to inform the problem space. Original contributions are the design of a custom multi-channel stimulator able to combine conventional and high frequency stimulation, establishing a suitable experimental platform for ex-vivo electrophysiology of the rat sciatic nerve model for HFAC block, and exploratory experiments to determine the feasibility of using HFAC block in combination with conventional stimulation to enhance the selectivity of minimally-invasive peripheral nerve interfaces.Open Acces

    Electronic bidirectional interfaces to the peripheral nervous system for prosthetic applications

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    The research presented in this thesis concerns the field of bioelectronics, in particular the work has been focused on the development of special electronic devices for neural signal acquisition and Peripheral Nervous System (PNS) stimulation. The final aim of the project in which this work is involved is in fact the realization of a prosthetic hand controlled using neural signals. The commercially available prosthesis are based on Electromyographic (EMG) signals, their use implies unnatural movements for the patient that needs a special training to develop the control capabilities over the mechanical limb. The proposed approach offers a number of advantages compared to the traditional prosthesis, first because the signals used are the same used to control the biologic limb, allowing a more comfortable solution for the patient that gets closer to feel the robotic hand as a natural extension of his/her body. Secondly, placing temperature and pressure sensors on the limb surface, it is possible to trasduce such information in an electrical current that, injected into the PNS, can restore the sensory feedback in amputees. The final goal of this research is the development of a fully implantable device able to perform a bidirectional communication between the robotic hand and the patient. Due to small area, low noise and low power constraints, the only possible way to reach this aim is the design of a full custom Integrated Circuit (IC). However a preliminary evaluation of the key design features, such as neural signal amplitudes and frequencies as well as stimulation shape parameters, is necessary in order to define clearly and precisely the design specifications. A low-cost and short implementation time device is then needed for this aim, the Components Off The Shelf (COTS) approach seems to be the best solution for this purpose. A Printed Circuit Board (PCB) with discrete components has been designed, developed and tested, the information extracted by the test results have been used to guide the IC design. The generation of electrical signals in biological cells, such as neural spikes, is possible thanks to ions that move across the cell membrane. In many applications it is important, not only to record the spikes, but also to measure these small currents in order to understand which electro-chemical processes are involved in the signal generation and to have a direct measurement of the ion channels involved in the reaction. Ion currents, in fact, play a key role in several physiological processes, in neural signal generation, but also in the maintenance of heartbeat and in muscle contraction. For this purpose, a system level implementation of a Read out circuit for ion channel current detection has been developed

    Electronic bidirectional interfaces to the peripheral nervous system for prosthetic applications

    Get PDF
    The research presented in this thesis concerns the field of bioelectronics, in particular the work has been focused on the development of special electronic devices for neural signal acquisition and Peripheral Nervous System (PNS) stimulation. The final aim of the project in which this work is involved is in fact the realization of a prosthetic hand controlled using neural signals. The commercially available prosthesis are based on Electromyographic (EMG) signals, their use implies unnatural movements for the patient that needs a special training to develop the control capabilities over the mechanical limb. The proposed approach offers a number of advantages compared to the traditional prosthesis, first because the signals used are the same used to control the biologic limb, allowing a more comfortable solution for the patient that gets closer to feel the robotic hand as a natural extension of his/her body. Secondly, placing temperature and pressure sensors on the limb surface, it is possible to trasduce such information in an electrical current that, injected into the PNS, can restore the sensory feedback in amputees. The final goal of this research is the development of a fully implantable device able to perform a bidirectional communication between the robotic hand and the patient. Due to small area, low noise and low power constraints, the only possible way to reach this aim is the design of a full custom Integrated Circuit (IC). However a preliminary evaluation of the key design features, such as neural signal amplitudes and frequencies as well as stimulation shape parameters, is necessary in order to define clearly and precisely the design specifications. A low-cost and short implementation time device is then needed for this aim, the Components Off The Shelf (COTS) approach seems to be the best solution for this purpose. A Printed Circuit Board (PCB) with discrete components has been designed, developed and tested, the information extracted by the test results have been used to guide the IC design. The generation of electrical signals in biological cells, such as neural spikes, is possible thanks to ions that move across the cell membrane. In many applications it is important, not only to record the spikes, but also to measure these small currents in order to understand which electro-chemical processes are involved in the signal generation and to have a direct measurement of the ion channels involved in the reaction. Ion currents, in fact, play a key role in several physiological processes, in neural signal generation, but also in the maintenance of heartbeat and in muscle contraction. For this purpose, a system level implementation of a Read out circuit for ion channel current detection has been developed

    Bladder Volume Decoding from Afferent Neural Activity

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    RÉSUMÉ Lorsque les fonctions de stockage et de miction de la vessie échouent à la suite de traumatismes médullaires, ou en raison d'autres maladies neurologiques, de conditions de santé ou au vieillissement, des complications graves pour la santé du patient se produisent. Actuellement, il est possible de restaurer partiellement les fonctions de la vessie chez les patients réfractaires aux médicaments à l'aide des neurostimulateurs implantables. Pour améliorer l'efficacité et la sécurité de ces neuroprothèses, il faut un capteur de la vessie capable de détecter l’urine stockée afin de mettre en place un système en boucle fermée qui applique la stimulation électrique uniquement lorsque nécessaire. Le capteur peut également servir à aviser les patients ayant des sensations affaiblies pour les aviser en temps opportun le moment où la vessie doit être vidée ou quand un volume résiduel postmictionnel anormalement élevé reste après une miction incomplète. Dans cette thèse, on présente de nouvelles méthodes de mesure, ainsi qu’un processeur de signal numérique dédié pour décoder en temps réel le volume de la vessie à partir des enregistrements neuronaux afférents provenant des récepteurs naturels présents dans la paroi de la vessie. Nos principales contributions sont rapportées dans trois articles de journaux avec comité de lecture. On présente d'abord une revue exhaustive de la littérature comprenant des articles de journaux, des brevets et les livres les plus réputés portant sur l'anatomie, la physiologie et la physiopathologie du tractus urinaire inférieur ainsi que sur la mesure du volume ou la pression de la vessie. Cette étude nous a permis d'identifier les besoins qu'un capteur de la vessie doit satisfaire pour être utilisé dans des applications chroniques telles que celles proposées dans cette thèse. On présente aussi le résultat d’une analyse exhaustive des caractéristiques anatomiques et physiologiques de la vessie que nous avons identifiées d’avoir exercé une influence, ou même d’avoir empêché, la réalisation d'un tel capteur dans des études faites au cours des dernières années. Sur la base de cette étude et de l'évaluation systématique des méthodes de mesure pour la vessie, on a conclu que le principe de mesure le mieux adapté pour la surveillance chronique du volume de la vessie était la détection, la discrimination et le décodage de l'activité neuronale afférente découlant des récepteurs spécialisés du volume (mécanorécepteurs), au sujet desquels certains auteurs ont émis l'hypothèse de leur existence dans la muqueuse interne de la vessie. Ensuite, on présente la méthode de mesure qui permet d'estimer en temps réel le volume de la vessie à partir de l'activité afférente des mécanorécepteurs. Notre méthode a été validée avec les----------ABSTRACT Failure of the storage and voiding functions of the urinary bladder due to spinal cord injury (SCI), neural diseases, health conditions, or aging, causes serious complications in a patient's health. Currently, it is possible to partially restore bladder functions in drug-refractory patients using implantable neurostimulators. Improving the efficacy and safety of these neuroprostheses used for bladder functions restoration requires a bladder sensor (BS) capable of detecting urine volume in real-time to implement a closed-loop system that applies electrical stimulation only when required. The BS can also trigger an early warning to advise patients with impaired sensations when the bladder should be voided or when an abnormally high post-voiding residual volume remains after an incomplete voiding. In this thesis, we present new measurement methods and a dedicated digital signal processor for real-time decoding of the bladder volume through afferent neural signals arising from natural receptors present in the bladder wall. The main contributions of this thesis have been reported in three peer-reviewed journal papers. We first present a comprehensive literature review, including papers, patents and mainstay books of bladder anatomy, physiology, and pathophysiology. This review allowed us to identify the requirements (user needs) that a BS must meet for chronic applications, such as those proposed in this thesis. An exhaustive analysis of the particular anatomical and physiological characteristics of the bladder, which we realized had influenced or prevented the achievement of a BS for monitoring the bladder volume or pressure in past studies, are also presented. Based on this study and on a systematic assessment of the measurement methods published in past years, we determined the best measurement principle for chronic bladder volume monitoring: the detection, discrimination and decoding of the afferent neural activity stemming from specialized volume receptors (mechanoreceptors), on which some authors had hypothesized about its existence in the bladder inner mucosa. Next, we present methods that allows for a real-time estimation of bladder volume through the afferent activity of the bladder mechanoreceptors. Our method was validated with data acquired from anesthetized rats in acute experiments. It was possible to qualitatively estimate three states of bladder fullness in 100% of trials when the recorded afferent activity exhibited a Spearman’s correlation coefficient of 0.6 or better. Furthermore, we could quantitatively estimate the bladder volume, and also its pressure, using time-windows of properly chosen duration. The mea

    Acquisition systems and decoding algorithms of peripheral neural signals for prosthetic applications

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    During the years, neuroprosthetic applications have obtained a great deal of attention by the international research, especially in the bioengineering field, thanks to the huge investments on several proposed projects funded by the political institutions which consider the treatment of this particular disease of fundamental importance for the global community. The aim of these projects is to find a possible solution to restore the functionalities lost by a patient subjected to an upper limb amputation trying to develop, according to physiological considerations, a communication link between the brain in which the significant signals are generated and a motor prosthesis device able to perform the desired action. Moreover, the designed system must be able to give back to the brain a sensory feedback about the surrounding world in terms of pressure or temperature acquired by tactile biosensors placed at the surface of the cybernetic hand. It in fact allows to execute involuntarymovements when for example the armcomes in contact with hot objects. The development of such a closed-loop architecture involves the need to address some critical issues which depend on the chosen approach. Several solutions have been proposed by the researches of the field, each one differing with respect to where the neural signals are acquired, either at the central nervous systemor at the peripheral one,most of themfollowing the former even that the latter is always considered by the amputees amore natural way to handle the artificial limb. This research work is based on the use of intrafascicular electrodes directly implanted in the residual peripheral nerves of the stump which represents a good compromise choice in terms of invasiveness and selectivity extracting electroneurographic (ENG) signals from which it is possible to identify the significant activity of a quite limited number of neuronal cells. In the perspective of the hardware implementation of the resulting solution which can work autonomously without any intervention by the amputee in an adaptive way according to the current characteristics of the processed signal and by using batteries as power source allowing portability, it is necessary to fulfill the tight constraints imposed by the application under consideration involved in each of the various phases which compose the considered closed-loop system. Regarding to the recording phase, the implementation must be able to remove the unwanted interferences mainly due to the electro-stimulations of themuscles placed near the electrodes featured by an order of magnitude much greater in comparison to that of the signals of interest amplifying the frequency components belonging to the significant bandwidth, and to convert them with a high resolution in order to obtain good performance at the next processing phases. To this aim, a recording module for peripheral neural signals will be presented, based on the use of a sigma-delta architecture which is composed by two main parts: an analog front-end stage for neural signal acquisition, pre-filtering and sigma-delta modulation and a digital unit for sigma-delta decimation and system configuration. Hardware/software cosimulations exploiting the Xilinx System Generator tool in Matlab Simulink environment and then transistor-level simulations confirmed that the system is capable of recording neural signals in the order of magnitude of tens of ÎĽV rejecting the huge low-frequency noise due to electromyographic interferences. The same architecture has been then exploited to implement a prototype of an 8-channel implantable electronic bi-directional interface between the peripheral nervous system and the neuro-controlled hand prosthesis. The solution includes a custom designed Integrated Circuit (0.35ÎĽm CMOS technology), responsible of the signal pre-filtering and sigma-delta modulation for each channel and the neural stimuli generation (in the opposite path) based on the directives sent by a digital control systemmapped on a low-cost Xilinx FPGA Spartan-3E 1600 development board which also involves the multi-channel sigma-delta decimation with a high-order band-pass filter as first stage in order to totally remove the unwanted interferences. In this way, the analog chip can be implanted near the electrodes thanks to its limited size avoiding to add a huge noise to theweak neural signals due to longwires connections and to cause heat-related infections, shifting the complexity to the digital part which can be hosted on a separated device in the stump of the amputeewithout using complex laboratory instrumentations. The system has been successfully tested from the electrical point of view and with in-vivo experiments exposing good results in terms of output resolution and noise rejection even in case of critical conditions. The various output channels at the Nyquist sampling frequency coming from the acquisition system must be processed in order to decode the intentions of movements of the amputee, applying the correspondent electro-mechanical stimulation in input to the cybernetic hand in order to perform the desired motor action. Different decoding approaches have been presented in the past, the majority of them were conceived starting from the relative implementation and performance evaluation of their off-line version. At the end of the research, it is necessary to develop these solutions on embedded systems performing an online processing of the peripheral neural signals. However, it is often possible only by using complex hardware platforms clocked at very high operating frequencies which are not be compliant with the low-power requirements needed to allow portability for the prosthetic device. At present, in fact, the important aspect of the real-time implementation of sophisticated signal processing algorithms on embedded systems has been often overlooked, notwithstanding the impact that limited resources of the former may have on the efficiency/effectiveness of any given algorithm. In this research work it has been addressed the optimization of a state-of-the-art algorithmfor PNS signals decoding that is a step forward for its real-time, full implementation onto a floating-point Digital Signal Processor (DSP). Beyond low-level optimizations, different solutions have been proposed at an high level in order to find the best trade-off in terms of effectiveness/efficiency. A latency model, obtained through cycle accurate profiling of the different code sections, has been drawn in order to perform a fair performance assessment. The proposed optimized real-time algorithmachieves up to 96% of correct classification on real PNS signals acquired through tf-LIFE electrodes on animals, and performs as the best off-line algorithmfor spike clustering on a synthetic cortical dataset characterized by a reasonable dissimilarity between the spikemorphologies of different neurons. When the real-time requirements are joined to the fulfilment of area and power minimization for implantable/portable applications, such as for the target neuroprosthetic devices, only custom VLSI implementations can be adopted. In this case, every part of the algorithmshould be carefully tuned. To this aim, the first preprocessing stage of the decoding algorithmbased on the use of aWavelet Denoising solution able to remove also the in-band noise sources has been deeply analysed in order to obtain an optimal hardware implementation. In particular, the usually overlooked part related to threshold estimation has been evaluated in terms of required hardware resources and functionality, exploiting the commercial Xilinx System Generator tool for the design of the architecture and the co-simulation. The analysis has revealed how the widely used Median Absolute Deviation (MAD) could lead o hardware implementations highly inefficient compared to other dispersion estimators demonstrating better scalability, relatively to the specific application. Finally, two different hardware implementations of the reference decoding algorithm have been presented highlighting pros and cons of each one of them. Firstly, a novel approach based on high-level dataflow description and automatic hardware generation is presented and evaluated on the on-line template-matching spike sorting algorithmwhich represents the most complex processing stage. It starts from the identification of the single kernels with the greater computational complexity and using their dataflow description to generate the HDL implementation of a coarse-grained reconfigurable global kernel characterized by theminimumresources in order to reduce the area and the energy dissipation for the fulfilment of the low-power requirements imposed by the application. Results in the best case have revealed a 71%of area saving compared tomore traditional solutions,without any accuracy penalty. With respect to single kernels execution, better latency performance are achievable stillminimizing the number of adopted resources. The performance in terms of latency can also be improved by tuning the implemented parallelismin the light of a defined number of channels and real-time constraints, by using more than one reconfigurable global kernel in order that they can be exploited to perform the same or different kernels at the same time in a parallel way, due to the fact that each one can execute the relative processing only in a sequential way. For this reason, a second FPGA-based prototype has been proposed based on the use of aMulti-Processor System-on-Chip (MPSoC) embedded architecture. This prototype is capable of respecting the real-time constraints posed by the application when clocked at less than 50 MHz, in comparison to 300 MHz of the previous DSP implementation. Considering that the application workload is extremely data dependent and unpredictable due to the sparsity of the neural signals, the architecture has to be dimensioned taking into account critical worst-case operating conditions in order to always ensure the correct functionality. To compensate the resulting overprovisioning of the system architecture, a software-controllable power management based on the use of clock gating techniques has been integrated in order tominimize the dynamic power consumption of the resulting solution. Summarizing, this research work can be considered a sort of proof-of-concept for the proposed techniques considering all the design issues which characterize each stage of the closed-loop system in the perspective of a portable low-power real-time hardware implementation of the neuro-controlled prosthetic device

    Acquisition systems and decoding algorithms of peripheral neural signals for prosthetic applications

    Get PDF
    During the years, neuroprosthetic applications have obtained a great deal of attention by the international research, especially in the bioengineering field, thanks to the huge investments on several proposed projects funded by the political institutions which consider the treatment of this particular disease of fundamental importance for the global community. The aim of these projects is to find a possible solution to restore the functionalities lost by a patient subjected to an upper limb amputation trying to develop, according to physiological considerations, a communication link between the brain in which the significant signals are generated and a motor prosthesis device able to perform the desired action. Moreover, the designed system must be able to give back to the brain a sensory feedback about the surrounding world in terms of pressure or temperature acquired by tactile biosensors placed at the surface of the cybernetic hand. It in fact allows to execute involuntarymovements when for example the armcomes in contact with hot objects. The development of such a closed-loop architecture involves the need to address some critical issues which depend on the chosen approach. Several solutions have been proposed by the researches of the field, each one differing with respect to where the neural signals are acquired, either at the central nervous systemor at the peripheral one,most of themfollowing the former even that the latter is always considered by the amputees amore natural way to handle the artificial limb. This research work is based on the use of intrafascicular electrodes directly implanted in the residual peripheral nerves of the stump which represents a good compromise choice in terms of invasiveness and selectivity extracting electroneurographic (ENG) signals from which it is possible to identify the significant activity of a quite limited number of neuronal cells. In the perspective of the hardware implementation of the resulting solution which can work autonomously without any intervention by the amputee in an adaptive way according to the current characteristics of the processed signal and by using batteries as power source allowing portability, it is necessary to fulfill the tight constraints imposed by the application under consideration involved in each of the various phases which compose the considered closed-loop system. Regarding to the recording phase, the implementation must be able to remove the unwanted interferences mainly due to the electro-stimulations of themuscles placed near the electrodes featured by an order of magnitude much greater in comparison to that of the signals of interest amplifying the frequency components belonging to the significant bandwidth, and to convert them with a high resolution in order to obtain good performance at the next processing phases. To this aim, a recording module for peripheral neural signals will be presented, based on the use of a sigma-delta architecture which is composed by two main parts: an analog front-end stage for neural signal acquisition, pre-filtering and sigma-delta modulation and a digital unit for sigma-delta decimation and system configuration. Hardware/software cosimulations exploiting the Xilinx System Generator tool in Matlab Simulink environment and then transistor-level simulations confirmed that the system is capable of recording neural signals in the order of magnitude of tens of ÎĽV rejecting the huge low-frequency noise due to electromyographic interferences. The same architecture has been then exploited to implement a prototype of an 8-channel implantable electronic bi-directional interface between the peripheral nervous system and the neuro-controlled hand prosthesis. The solution includes a custom designed Integrated Circuit (0.35ÎĽm CMOS technology), responsible of the signal pre-filtering and sigma-delta modulation for each channel and the neural stimuli generation (in the opposite path) based on the directives sent by a digital control systemmapped on a low-cost Xilinx FPGA Spartan-3E 1600 development board which also involves the multi-channel sigma-delta decimation with a high-order band-pass filter as first stage in order to totally remove the unwanted interferences. In this way, the analog chip can be implanted near the electrodes thanks to its limited size avoiding to add a huge noise to theweak neural signals due to longwires connections and to cause heat-related infections, shifting the complexity to the digital part which can be hosted on a separated device in the stump of the amputeewithout using complex laboratory instrumentations. The system has been successfully tested from the electrical point of view and with in-vivo experiments exposing good results in terms of output resolution and noise rejection even in case of critical conditions. The various output channels at the Nyquist sampling frequency coming from the acquisition system must be processed in order to decode the intentions of movements of the amputee, applying the correspondent electro-mechanical stimulation in input to the cybernetic hand in order to perform the desired motor action. Different decoding approaches have been presented in the past, the majority of them were conceived starting from the relative implementation and performance evaluation of their off-line version. At the end of the research, it is necessary to develop these solutions on embedded systems performing an online processing of the peripheral neural signals. However, it is often possible only by using complex hardware platforms clocked at very high operating frequencies which are not be compliant with the low-power requirements needed to allow portability for the prosthetic device. At present, in fact, the important aspect of the real-time implementation of sophisticated signal processing algorithms on embedded systems has been often overlooked, notwithstanding the impact that limited resources of the former may have on the efficiency/effectiveness of any given algorithm. In this research work it has been addressed the optimization of a state-of-the-art algorithmfor PNS signals decoding that is a step forward for its real-time, full implementation onto a floating-point Digital Signal Processor (DSP). Beyond low-level optimizations, different solutions have been proposed at an high level in order to find the best trade-off in terms of effectiveness/efficiency. A latency model, obtained through cycle accurate profiling of the different code sections, has been drawn in order to perform a fair performance assessment. The proposed optimized real-time algorithmachieves up to 96% of correct classification on real PNS signals acquired through tf-LIFE electrodes on animals, and performs as the best off-line algorithmfor spike clustering on a synthetic cortical dataset characterized by a reasonable dissimilarity between the spikemorphologies of different neurons. When the real-time requirements are joined to the fulfilment of area and power minimization for implantable/portable applications, such as for the target neuroprosthetic devices, only custom VLSI implementations can be adopted. In this case, every part of the algorithmshould be carefully tuned. To this aim, the first preprocessing stage of the decoding algorithmbased on the use of aWavelet Denoising solution able to remove also the in-band noise sources has been deeply analysed in order to obtain an optimal hardware implementation. In particular, the usually overlooked part related to threshold estimation has been evaluated in terms of required hardware resources and functionality, exploiting the commercial Xilinx System Generator tool for the design of the architecture and the co-simulation. The analysis has revealed how the widely used Median Absolute Deviation (MAD) could lead o hardware implementations highly inefficient compared to other dispersion estimators demonstrating better scalability, relatively to the specific application. Finally, two different hardware implementations of the reference decoding algorithm have been presented highlighting pros and cons of each one of them. Firstly, a novel approach based on high-level dataflow description and automatic hardware generation is presented and evaluated on the on-line template-matching spike sorting algorithmwhich represents the most complex processing stage. It starts from the identification of the single kernels with the greater computational complexity and using their dataflow description to generate the HDL implementation of a coarse-grained reconfigurable global kernel characterized by theminimumresources in order to reduce the area and the energy dissipation for the fulfilment of the low-power requirements imposed by the application. Results in the best case have revealed a 71%of area saving compared tomore traditional solutions,without any accuracy penalty. With respect to single kernels execution, better latency performance are achievable stillminimizing the number of adopted resources. The performance in terms of latency can also be improved by tuning the implemented parallelismin the light of a defined number of channels and real-time constraints, by using more than one reconfigurable global kernel in order that they can be exploited to perform the same or different kernels at the same time in a parallel way, due to the fact that each one can execute the relative processing only in a sequential way. For this reason, a second FPGA-based prototype has been proposed based on the use of aMulti-Processor System-on-Chip (MPSoC) embedded architecture. This prototype is capable of respecting the real-time constraints posed by the application when clocked at less than 50 MHz, in comparison to 300 MHz of the previous DSP implementation. Considering that the application workload is extremely data dependent and unpredictable due to the sparsity of the neural signals, the architecture has to be dimensioned taking into account critical worst-case operating conditions in order to always ensure the correct functionality. To compensate the resulting overprovisioning of the system architecture, a software-controllable power management based on the use of clock gating techniques has been integrated in order tominimize the dynamic power consumption of the resulting solution. Summarizing, this research work can be considered a sort of proof-of-concept for the proposed techniques considering all the design issues which characterize each stage of the closed-loop system in the perspective of a portable low-power real-time hardware implementation of the neuro-controlled prosthetic device

    An implantable micro-system for neural prosthesis control and sensory feedback restoration in amputees

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    In this work, the prototype of an electronic bi-directional interface between the Peripheral Nervous System (PNS) and a neuro-controlled hand prosthesis is presented. The system is composed of two Integrated Circuits (ICs): a standard CMOS device for neural recording and a High Voltage (HV) CMOS device for neural stimulation. The integrated circuits have been realized in two different 0.35μm CMOS processes available fromAustriaMicroSystem(AMS). The recoding IC incorporates 8 channels each including the analog front-end and the A/D conversion based on a sigma delta architecture. It has a total area of 16.8mm2 and exhibits an overall power consumption of 27.2mW. The neural stimulation IC is able to provide biphasic current pulses to stimulate 8 electrodes independently. A voltage booster generates a 17V voltage supply in order to guarantee the programmed stimulation current even in case of high impedances at the electrode-tissue interface in the order of tens of k­. The stimulation patterns, generated by a 5-bit current DAC, are programmable in terms of amplitude, frequency and pulse width. Due to the huge capacitors of the implemented voltage boosters, the stimulation IC has a wider area of 18.6mm2. In addition, a maximum power consumption of 29mW was measured. Successful in-vivo experiments with rats having a TIME electrode implanted in the sciatic nerve were carried out, showing the capability of recording neural signals in the tens of microvolts, with a global noise of 7μVrms , and to selectively elicit the tibial and plantarmuscles using different active sites of the electrode. In order to get a completely implantable interface, a biocompatible and biostable package was designed. It hosts the developed ICs with the minimal electronics required for their proper operation. The package consists of an alumina tube closed at both extremities by two ceramic caps hermetically sealed on it. Moreover, the two caps serve as substrate for the hermetic feedthroughs to enable the device powering and data exchange with the external digital controller implemented on a Field-Programmable Gate Array (FPGA) board. The package has an outer diameter of 7mm and a total length of 26mm. In addition, a humidity and temperature sensor was also included inside the package to allow future hermeticity and life-time estimation tests. Moreover, a wireless, wearable and non-invasive EEG recording system is proposed in order to improve the control over the artificial limb,by integrating the neural signals recorded from the PNS with those directly acquired from the brain. To first investigate the system requirements, a Component-Off-The-Shelf (COTS) device was designed. It includes a low-power 8- channel acquisition module and a Bluetooth (BT) transceiver to transmit the acquired data to a remote platform. It was designed with the aimof creating a cheap and user-friendly system that can be easily interfaced with the nowadays widely spread smartphones or tablets by means of a mobile-based application. The presented system, validated through in-vivo experiments, allows EEG signals recording at different sample rates and with a maximum bandwidth of 524Hz. It was realized on a 19cm2 custom PCB with a maximum power consumption of 270mW

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