3,792 research outputs found

    Scheduling Architectures for DiffServ Networks with Input Queuing Switches

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    ue to its simplicity and scalability, the differentiated services (DiffServ) model is expected to be widely deployed across wired and wireless networks. Though supporting DiffServ scheduling algorithms for output-queuing (OQ) switches have been widely studied, there are few DiffServ scheduling algorithms for input-queuing (IQ) switches in the literaure. In this paper, we propose two algorithms for scheduling DiffServ DiffServ networks with IQ switches: the dynamic DiffServ scheduling (DDS) algorithm and the hierarchical DiffServ scheduling (HDS) algorithm. The basic idea of DDS and HDS is to schedule EF and AF traffic According to Their minimum service rates with the reserved bandwidth and schedule AF and BE traffic fairly with the excess bandwidth. Both DDS and HDS find a maximal weight matching but in different ways. DDS employs a Centralized scheduling scheme. HDS features a hierarchical scheduling scheme That Consists of two levels of schedulers: the central scheduler and port schedulers. Using such a hierarchical scheme, the Implementation complexity and the amount of information needs to be Transmitted between input ports and the central scheduler for HDS are dramatically reduced Compared with DDS. Through simulations, we show That both DDS and HDS popup Guarantees a minimum bandwidth for EF and AF traffic, as well as fair bandwidth allocation for BE traffic. The delay and jitter performance of the DDS is close to That of PQWRR, an existing DiffServ supporting scheduling algorithm for OQ switches. The tradeoff of the simpler Implementation scheme of HDS is its slightly worse delay performance Compared with DDS

    Modified bipartite matching for multiobjective optimization

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    In graph theory, the Hungarian algorithm can provide the maximum weighted bipartite matching for assignment problems. In this paper, a modified bipartite matching (MBM) algorithm is proposed for multiobjective optimization. This algorithm can be widely used to solve the weighted bipartite matching problem with multiobjective optimization. We illustrate the application of MBM to antenna assignments in wireless MIMO system. The simulation results show that MBM enjoys low computational complexity and maximizes the system capacity, while keeping the fairness among mobile users. ©2007 IEEE.published_or_final_versio

    A Survey on Array Storage, Query Languages, and Systems

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    Since scientific investigation is one of the most important providers of massive amounts of ordered data, there is a renewed interest in array data processing in the context of Big Data. To the best of our knowledge, a unified resource that summarizes and analyzes array processing research over its long existence is currently missing. In this survey, we provide a guide for past, present, and future research in array processing. The survey is organized along three main topics. Array storage discusses all the aspects related to array partitioning into chunks. The identification of a reduced set of array operators to form the foundation for an array query language is analyzed across multiple such proposals. Lastly, we survey real systems for array processing. The result is a thorough survey on array data storage and processing that should be consulted by anyone interested in this research topic, independent of experience level. The survey is not complete though. We greatly appreciate pointers towards any work we might have forgotten to mention.Comment: 44 page

    Experimental survey of FPGA-based monolithic switches and a novel queue balancer

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    This paper studies small to medium-sized monolithic switches for FPGA implementation and presents a novel switch design that achieves high algorithmic performance and FPGA implementation efficiency. Crossbar switches based on virtual output queues (VOQs) and variations have been rather popular for implementing switches on FPGAs, with applications in network switches, memory interconnects, network-on-chip (NoC) routers etc. The implementation efficiency of crossbar-based switches is well-documented on ASICs, though we show that their disadvantages can outweigh their advantages on FPGAs. One of the most important challenges in such input-queued switches is the requirement for iterative scheduling algorithms. In contrast to ASICs, this is more harmful on FPGAs, as the reduced operating frequency and narrower packets cannot “hide” multiple iterations of scheduling that are required to achieve a modest scheduling performance.Our proposed design uses an output-queued switch internally for simplifying scheduling, and a queue balancing technique to avoid queue fragmentation and reduce the need for memory-sharing VOQs. Its implementation approaches the scheduling performance of a state-of-the-art FPGA-based switch, while requiring considerably fewer resources

    Multiobjective optimized bipartite matching for resource allocation

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    The Hungarian algorithm can provide the maximum weighted bipartite matching for assignment problems. However it can only solve the single objective weight optimization problem. In this paper, a modified bipartite matching (MBM) algorithm is proposed to solve the weighted bipartite matching problem with multiobjective optimization. In addition, our MBM algorithm is applicable to asymmetric bipartite graph, which is common in resource allocation problems. We illustrate the application of MBM to antenna assignments in wireless multipleinput multiple-output (MIMO) systems for both symmetric and asymmetric scenarios. The simulation results show that MBM enjoys low computational complexity and maximizes the system capacity, while keeping the fairness among mobile users. © 2007 IEEE.published_or_final_versio

    Weighted round robin scheduling in input-queued packet switches subject to deadline constraints

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    Ankara : Department of Electrical and Electronics Engineering and the Institute of Engineering and Science of Bilkent Univ., 2000.Thesis (Master's) -- Bilkent University, 2000.Includes bibliographical references leaves 59-63In this thesis work, the problem of scheduling deadline constrained traffic is studied. The problem is explored in terms of Weighted Round Robin (WRR) service discipline in input queued packet switches. Application of the problem may arise in packet switching networks and Satellite-Switched Time Division Multiple Access (SS/TDMA) systems. A new formulation of the problem is presented. The main contribution of the thesis is a ’’backward extraction” technique to schedule packet forwarding through the switch fabric. A number of heuristic algorithms, each based on backward extraction, are proposed, and their performances are studied via simulation. Numerical results show that the algorithms perform significantly better than earlier proposed algorithms. The experimental results strongly assert Philp and Liu conjecture.Rai, Idris AM.S
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