CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current

Implementation of a sigma delta modulator for a class D audio power amplifier

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadore

A High-Efficiency 4x45W Car Audio Power Amplifier using Load Current Sharing

A 4x45W (EIAJ) monolithic car audio power amplifier is presented that achieves a power dissipation decrease of nearly 2x over standard class AB operation by sharing load currents between loudspeakers. Output signals are conditioned using a common-mode control loop to allow switch placement between loads with minimal THD increase. A prototype is realized in a SOI bipolar-CMOS-DMOS process with 0.5μm feature size. Die area is 7.5x4.6mm2. THD+N @(1kHz,10W) is 0.05%

Class-G Headphone Amplifier Architectures

To maximize the battery life of portable audio devices like iPods, MP3 players and mobile phones, there is a need for audio power amplifiers with low quiescent power, high efficiency along with uncompromising quality (Distortion performance/ THD) and low cost. Despite their high efficiency, Class-D amplifiers are undesirable as headphone drivers in mobile devices, owing to their high EMI radiation, additional costs due to filtering required at the output and also their poor linearity at small signal levels. Almost all of todays headphone drivers are Class-AB linear amplifiers, with poor efficiencies. Here we propose a Class-G linear amplifier, which uses rail switching to improve efficiency. It can be viewed as a Class-AB amplifier operating from the lower supply and a Class-C amplifier from the higher supply. Though the classical definition of efficiency using full-scale sine wave does not show much improvement for Class-G (85.9 percent) over Class-AB (78 percent), we demonstrate that the Class-G audio amplifiers can have significant improvement of efficiencies (battery life) in the practical sense. By considering the amplitude distribution of audio signals a new realistic definition of efficiency has been proposed. This definition helps in demonstrating the advantage of using Class-G over Class-AB and also helps in optimizing the choice of supply voltages which is critical to maximizing the efficiency of Class-G amplifiers. Two new circuit topologies have been proposed and thoroughly investigated. The first circuit is more like a developmental stage and is designed/fabricated in AMI 0.5um. The second proposed Class-G amplifier with modified Class-AB bias, implemented in IBM 90nm, achieves -82.5dB THD N by seamless supply switching and uses the least reported quiescent power (350 mu W) and area (0.08mm^2)

Interface Circuits for Microsensor Integrated Systems

ca. 200 words; this text will present the book in all promotional forms (e.g. flyers). Please describe the book in straightforward and consumer-friendly terms. [Recent advances in sensing technologies, especially those for Microsensor Integrated Systems, have led to several new commercial applications. Among these, low voltage and low power circuit architectures have gained growing attention, being suitable for portable long battery life devices. The aim is to improve the performances of actual interface circuits and systems, both in terms of voltage mode and current mode, in order to overcome the potential problems due to technology scaling and different technology integrations. Related problems, especially those concerning parasitics, lead to a severe interface design attention, especially concerning the analog front-end and novel and smart architecture must be explored and tested, both at simulation and prototype level. Moreover, the growing demand for autonomous systems gets even harder the interface design due to the need of energy-aware cost-effective circuit interfaces integrating, where possible, energy harvesting solutions. The objective of this Special Issue is to explore the potential solutions to overcome actual limitations in sensor interface circuits and systems, especially those for low voltage and low power Microsensor Integrated Systems. The present Special Issue aims to present and highlight the advances and the latest novel and emergent results on this topic, showing best practices, implementations and applications. The Guest Editors invite to submit original research contributions dealing with sensor interfacing related to this specific topic. Additionally, application oriented and review papers are encouraged.