One-Quadrant Switched-Mode Power Converters

This article presents the main topics related to one-quadrant power converters. The basic topologies are analysed and a simple methodology to obtain the steady-state output-input voltage ratio is set out. A short discussion of different methods to control one-quadrant power converters is presented. Some of the reported derived topologies of one-quadrant power converters are also considered. Some topics related to one-quadrant power converters such as synchronous rectification, hard and soft commutation, and interleaved converters are discussed. Finally, a brief introduction to resonant converters is given.Comment: 25 pages, contribution to the 2014 CAS - CERN Accelerator School: Power Converters, Baden, Switzerland, 7-14 May 201

Discussion of the technology and research in fuel injectors common rail system

Common rail is one of the most important components in a diesel and gasoline direct injection system. It features a high-pressure (100 bar) fuel rail feeding solenoid valves, as opposed to a low-pressure fuel pump feeding unit injectors. Third-generation common rail diesels now feature piezoelectric injectors for increased precision, with fuel pressures up to 2,500 bar. The purpose of this review paper is to investigate the technology and research in fuel injectors common rail system. This review paper focuses on component of common rail injection system, pioneer of common rail injection, characteristics of common rail injection system, method to reduce smoke and NOx emission simultaneously and impact of common rail injection system. Based on our research, it can be concluded that common rail injection gives many benefit such as good for the engine performance, safe to use, and for to reduce the emission of the vehicle. Fuel injection common rail system is the modern technology that must be developed. Nowadays, our earth is polluting by vehicle output such as smoke. If the common rail system is developed, it can reduce the pollution and keep our atmosphere clean and safe

High frequency electronic ballast provides line frequency lamp current

Most electronic ballasts for fluorescent lamps provide a sinusoidal lamp current at the switching frequency. The high-frequency current flowing through the lamp can generate significant radiated noise, which is unacceptable in noise-sensitive applications, such as fluorescent lights in airplanes. Using shielded enclosures for the lamps may solve the problem, but it is expensive. A discontinuous conduction mode (DCM) electronic ballast topology is presented which drives the lamp with line frequency current, just like a magnetic ballast. However, compared to a magnetic ballast, its weight is substantially reduced due to operation at 40 kHz switching frequency. The topology also ensures unity power factor at the input and stable lamp operation at the output

A peak capacitor current pulse-train controlled buck converter with fast transient response and a wide load range

It is known that ripple-based control of a switching dc-dc converter benefits from a faster transient response than a conventional PWM control switching dc-dc converter. However, ripple-based control switching dc-dc converters may suffer from fast-scale oscillation. In order to achieve fast transient response and ensure stable operation of a switching dc-dc converter over a wide load range, based on a conventional pulse train control technique, a peak capacitor current pulse train (PCC-PT) control technique is proposed in this paper. With a buck converter as an example, the operating modes, steady-state performance and transient respond performance of a PCC-PT controlled buck converter are presented and assessed. To eliminate fast-scale oscillation, circuit and control parameter design consideration are given. An accurate discrete iteration model of a PCC-PT controlled buck converter is established, based on which, the effects of circuit parameters on stability of converter operating in a DCM mode, mixed DCM-CCM mode, and CCM mode are studied. Simulation and experimental results are presented to verify the analysis results

Dynamic modeling of pwm and single-switch single-stage power factor correction converters

The concept of averaging has been used extensively in the modeling of power electronic circuits to overcome their inherent time-variant nature. Among various methods, the PWM switch modeling approach is most widely accepted in the study of closed-loop stability and transient response because of its accuracy and simplicity. However, a non-ideal PWM switch model considering conduction losses is not available except for converters operating in continuous conduction mode (CCM) and under small ripple conditions. Modeling of conductor losses under large ripple conditions has not been reported in the open literature, especially when the converter operates in discontinuous conduction mode (DCM). In this dissertation, new models are developed to include conduction losses in the non-ideal PWM switch model under CCM and DCM conditions. The developed model is verified through two converter examples and the effect of conduction losses on the steady state and dynamic responses of the converter is also studied. Another major constraint of the PWM switch modeling approach is that it heavily relies on finding the three-terminal PWM switch. This requirement severely limits its application in modeling single-switch single-stage power factor correction (PFC) converters, where more complex topological structures and switching actions are often encountered. In this work, we developed a new modeling approach which extends the PWM switch concept by identifying the charging and discharging voltages applied to the inductors. The new method can be easily applied to derive large-signal models for a large group of PFC converters and the procedure is elaborated through a specific example. Finally, analytical results regarding harmonic contents and power factors of various PWM converters in PFC applications are also presented here

Suitability of Pulse Train™, A Novel Digitally Implemented Real-Time Control Technique, for BIFRED Converter

Pulse TrainTM, a new control scheme, is presented and applied to a BIFRED converter operating in discontinuous conduction mode (DCM), which avoids the light-load high-voltage stress problem. In contrast to the conventional control techniques, the principal idea of Pulse Train is to regulate the output voltage using a series of high and low energy pulses generated by the current of the inductor. In this paper, applicability of the proposed technique to both the input and magnetizing inductances of BIFRED converter is investigated. Analysis of BIFRED converter operating in DCM as well as the output voltage ripple estimation are given. Experimental results on a prototype converter are also presented

Multi-harmonic Modeling of Low-power PWM DC-DC Converter

Modeling and simulation of switched-mode Pulse Width Modulated (PWM) DC-DC converters form an essential ingredient in the analysis and design process of integrated circuits. In this research work, we present a novel large-signal modeling technique for low-power PWM DC-DC converters. The proposed model captures not only the time-averaged response within each moving switching cycle but also high-order harmonics of an arbitrary degree, hence modeling both the average component and ripple very accurately. The proposed model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. By continuously monitoring state variables, our model seamlessly transitions between the continuous conduction mode (CCM) and discontinuous conduction mode (DCM), which often occurs in low-power applications. The nonlinearities of devices are also considered and efficiently evaluated resulting in a significant improvement in model accuracy. With a system decoupling technique, the DC response of the model is decoupled from higher-order harmonics, providing additional simulation speedups. For a number of converter designs, the proposed model obtains up to 10x runtime speedups over transistor-level transient simulation with a maximum output voltage error less than 4%

The voltage-controlled compensation ramp: A new waveshaping technique for power factor correctors

IEEE Applied Power Electronics Conference (APEC) (27. 2008. Austin, Texas)This paper deals with a new control method for Power Factor Correctors. Control is carried out by a standard IC controller for peak current-mode dc-dc converters, with only an additional compensation ramp generator and peak detector. Neither an analog multiplier nor an input voltage sensor is needed to achieve quasi-sinusoidal line waveforms, which makes this method very attractive. The method is similar to the one-cycle control method, but can be very easily adapted for use with topologies different to the boost converter, i.e. flyback, buck-boost, SEPIC Cuk and Zeta topologies. Moreover, as the line current is cycle-by-cycle controlled, the resulting input current feedback loop is extremely fast, thus allowing the use of this type of control with high frequency line

Single-stage ac–dc buck–boost converter for medium-voltage high-power applications

This study proposes three topologies based on single-stage three-phase ac-dc buck-boost converters suitable for medium-voltage high-power applications. The first two topologies are based on a dual three-phase buck-boost converter, with a three-winding phase-shifted transformer to achieve sinusoidal input currents, with relatively small ac filters. The limitation of these two topologies is the switching devices are exposed either to a high voltage beyond that tolerable by a single device. The third topology is based on three single-phase buck-boost converters; with their dc output terminals connected in series to generate high voltage. By using this approach, voltage stresses on the switching devices are greatly reduced, and sinusoidal input currents with nearly unity power factor is achieved over the entire operating range when using small ac filters. Analysis, PSCAD/EMTDC simulations and experimentation are used to assess the feasibility of the proposed topologies during normal operation. Major findings of this study are discussed and summarised as a comparison between the three topologies