Measuring Level of Degradation in Power Semiconductor Devices using Emerging Techniques

Title from PDF of title page viewed May 24, 2021Dissertation advisor: Faisal KhanVitaIncludes bibliographical references (page 124-154)Thesis (Ph.D.)--School of Computing and Engineering and Department of Mathematics and Statistics, University of Missouri--Kansas City, 2021High thermal and electrical stress, over a period of time tends to deteriorate the health of power electronic switches. Being a key element in any high-power converter systems, power switches such as insulated-gate bipolar junction transistors (IGBTs) and metal-oxide semiconductor field-effect transistors (MOSFETs) are constantly monitored to predict when and how they might fail. A huge fraction of research efforts involves the study of power electronic device reliability and development of novel techniques with higher accuracy in health estimation of such devices. Until today, no other existing techniques can determine the number of lifted bond wires and their locations in a live IGBT module, although this information is extremely helpful to understand the overall state of health (SOH) of an IGBT power module. Through this research work, two emerging methods for online condition monitoring of power IGBTs and MOSFETs have been proposed. First method is based on reflectometry, more specifically, spread spectrum time domain reflectometry (SSTDR) and second method is based on ultrasound based non-destructive evaluation (NDE). Unlike traditional methods, the proposed methods do not require measuring any electrical parameters (such as voltage or current), therefore, minimizes the measurement error. In addition, both of these methods are independent of the operating points of the converter which makes the application of these methods more feasible for any field application. As part of the research, the RL-equivalent circuit to represent the bond wires of an IGBT module has been developed for the device under test. In addition, an analytical model of ultrasound interaction with the bond wires has been derived in order to efficiently detect the bond wire lift offs within the IGBT power module. Both of these methods are equally applicable to the wide band gap (WBG) power devices and power converters. The successful implementation of these methods creates a provision for condition monitoring (CM) hardware embedded gate driver module which will significantly reduce the overall health monitoring cost.Introduction -- Failure mechanisms of modern power electronic devices -- Existing degradation detection & lifetime prediction techniques -- Accelerated aging methods -- SSTDR based degradation detection -- Ultrasound based degradation -- Degradation detection of wide band gap power devices -- Conclusions and future researc

Piikarbidi-MOSFET:n kiihdytetty ikäännyttäminen ja prognostiikka

The reliability investigations in power semiconductor components have traditionally concentrated on statistical analysis of the failure data in order to set regular maintenance intervals to prevent failures in the field. A more recent discipline, prognostics, in turn attempts to evaluate the current state-of-health of the device online and to predict the remaining useful life by interpreting signals of degradation. The utilization of prognostics is valuable to businesses as it enables addressing the maintenance only to the products close to failure. In this thesis we studied prognostics from the physics-based perspective in two types of silicon carbide power MOSFETs, in 11 samples in total. The components were aged in a power cycling test system to produce data of the selected failure precursor, drain-source on-state resistance. For the prognostic analysis we developed a kernel\hyp{}smoothing\hyp{}based particle filter and applied it to joint state\hyp{}parameter estimation of a selected sample. The analysis results indicated satisfactory performance regarding the estimation of the states and the parameters but revealed significant deficiencies in the prediction performance of the remaining useful life. Although the work mainly focuses on studying the power MOSFET as single component it is important to observe it also as a part of a larger entity. Therefore, at the end of the work we propose design principles for a new test system where the power MOSFET operates in a DC-DC converter. The derived precepts are based on the insight of reliability data analysis and prognostics gained during the study.Tehopuolijohdekomponenttien luotettavuustutkimukset ovat perinteisesti keskittyneet vikadatan tilastolliseen analyysiin säännöllisten huoltovälien asettamiseksi, joilla ehkäistään kentällä tapahtuvia vikaantumisia. Prognostiikka on uudempi tiedonala, joka puolestaan pyrkii määrittämään laitteen käytönaikaisen terveydentilan ja ennustamaan jäljellä olevan elinajan tulkitsemalla signaaleja huononemista. Prognostiikan hyödyntäminen on arvokasta liiketoiminnalle, sillä se mahdollistaa huollon kohdistamisen ainostaan niille laitteille, jotka ovat lähellä vikaantumista. Tässä diplomityössä tutkimme prognostiikkaa fysiikkaan pohjautuvasta näkökulmasta kahdessa erityyppisessä piikarbiditeho-MOSFET:ssa, kokonaisuudessaan 11 näytteessä. Komponentit ikäännytettiin tehosyklaustestissä nielulähdepäälläoloresistanssidatan keräämiseksi, joka valittiin vikaantumisindikaattoriksi. Prognostista analyysia varten kehitimme ydinsilotukseen perustuvan partikkelisuodattimen, jota sovelsimme yhdistetyyn tilaparametriestimointiin valitussa näytteessä. Analyysin tulokset osoittivat tyydyttävää suorituskykyä tilan ja parametrien estimointissa mutta paljastivat merkittäviä puutteita jäljellä olevan eliniän ennustamisessa. Vaikka työ pääosin keskittyy teho-MOSFET:n tutkimiseen yksittäisenä komponenttina, on tärkeä huomioda se myös osana suurempaa kokonaisuutta. Tämän vuoksi työn lopussa esitetään suunnitteluperiaatteita uutta testausjärjestelmää varten, jossa teho-MOSFET toimii DC-DC -muuntimessa. Johdetut ohjenuorat pohjaavat työn aikana kertyneelle ymmärrykselle luotettavuusdatan analysoinnista ja prognostiikasta

Degradation modeling and degradation-aware control of power electronic systems

The power electronics market is valued at $23.25 billion in 2019 and is projected to reach$ 36.64 billion by 2027. Power electronic systems (PES) have been extensively used in a wide range of critical applications, including automotive, renewable energy, industrial variable-frequency drive, etc. Thus, the PESs\u27 reliability and robustness are immensely important for the smooth operation of mission-critical applications. Power semiconductor switches are one of the most vulnerable components in the PES. The vulnerability of these switches impacts the reliability and robustness of the PES. Thus, switch-health monitoring and prognosis are critical for avoiding unexpected shutdowns and preventing catastrophic failures. The importance of the prognosis study increases dramatically with the growing popularity of the next-generation power semiconductor switches, wide bandgap switches. These switches show immense promise in the high-power high-frequency operations due to their higher breakdown voltage and lower switch loss. But their wide adaptation is limited by the inadequate reliability study. A thorough prognosis study comprising switch degradation modeling, remaining useful life (RUL) estimation, and degradation-aware controller development, is important to enhance the PESs\u27 robustness, especially with wide bandgap switches. In this dissertation, three studies are conducted to achieve these objectives- 1) Insulated Gate Bipolar Transistor (IGBT) degradation modeling and RUL estimation, 2) cascode Gallium Nitride (GaN) Field-Effect Transistor (FET) degradation modeling and RUL estimation, and 3) Degradation-aware controller design for a PES, solid-state transformer (SST). The first two studies have addressed the significant variation in RUL estimation and proposed degradation identification methods for IGBT and cascode GaN FET. In the third study, a system-level integration of the switch degradation model is implemented in the SST. The insight into the switch\u27s degradation pattern from the first two studies is integrated into developing a degradation-aware controller for the SST. State-of-the-art controllers do not consider the switch degradation that results in premature system failure. The proposed low-complexity degradation-aware and adaptive SST controller ensures optimal degradation-aware power transfer and robust operation over the lifetime