75 research outputs found
Silent Transitions in Automata with Storage
We consider the computational power of silent transitions in one-way automata
with storage. Specifically, we ask which storage mechanisms admit a
transformation of a given automaton into one that accepts the same language and
reads at least one input symbol in each step.
We study this question using the model of valence automata. Here, a finite
automaton is equipped with a storage mechanism that is given by a monoid.
This work presents generalizations of known results on silent transitions.
For two classes of monoids, it provides characterizations of those monoids that
allow the removal of \lambda-transitions. Both classes are defined by graph
products of copies of the bicyclic monoid and the group of integers. The first
class contains pushdown storages as well as the blind counters while the second
class contains the blind and the partially blind counters.Comment: 32 pages, submitte
Algorithmic Analysis of Array-Accessing Programs
For programs whose data variables range over Boolean or finite domains, program verification is decidable, and this forms the basis of recent tools for software model checking. In this paper, we consider algorithmic verification of programs that use Boolean variables, and in addition, access a single array whose length is potentially unbounded, and whose elements range over pairs from Σ × D, where Σ is a finite alphabet and D is a potentially unbounded data domain. We show that the reachability problem, while undecidable in general, is (1) Pspace-complete for programs in which the array-accessing for-loops are not nested, (2) solvable in Ex-pspace for programs with arbitrarily nested loops if array elements range over a finite data domain, and (3) decidable for a restricted class of programs with doubly-nested loops. The third result establishes connections to automata and logics defining languages over data words
The Complexity of Downward Closure Comparisons
The downward closure of a language is the set of all (not necessarily contiguous) subwords of its members. It is well-known that the downward closure of every language is regular. Moreover, recent results show that downward closures are computable for quite powerful system models.
One advantage of abstracting a language by its downward closure is that then equivalence and inclusion become decidable. In this work, we study the complexity of these two problems. More precisely, we consider the following decision problems: Given languages K and L from classes C and D, respectively, does the downward closure of K include (equal) that of L?
These problems are investigated for finite automata, one-counter automata, context-free grammars, and reversal-bounded counter automata. For each combination, we prove a completeness result either for fixed or for arbitrary alphabets. Moreover, for Petri net languages, we show that both problems are Ackermann-hard and for higher-order pushdown automata of order k, we prove hardness for complements of nondeterministic k-fold exponential time
On spiking neural P systems
This work deals with several aspects concerning the formal verification of SN P
systems and the computing power of some variants. A methodology based on the
information given by the transition diagram associated with an SN P system is presented.
The analysis of the diagram cycles codifies invariants formulae which enable us to establish
the soundness and completeness of the system with respect to the problem it tries to resolve.
We also study the universality of asynchronous and sequential SN P systems and the
capability these models have to generate certain classes of languages. Further, by making a
slight modification to the standard SN P systems, we introduce a new variant of SN P
systems with a special I/O mode, called SN P modules, and study their computing power. It
is demonstrated that, as string language acceptors and transducers, SN P modules can
simulate several types of computing devices such as finite automata, a-finite transducers,
and systolic trellis automata.Ministerio de Educación y Ciencia TIN2006-13425Junta de Andalucía TIC-58
Bounded Counter Languages
We show that deterministic finite automata equipped with two-way heads
are equivalent to deterministic machines with a single two-way input head and
linearly bounded counters if the accepted language is strictly bounded,
i.e., a subset of for a fixed sequence of symbols . Then we investigate linear speed-up for counter machines. Lower
and upper time bounds for concrete recognition problems are shown, implying
that in general linear speed-up does not hold for counter machines. For bounded
languages we develop a technique for speeding up computations by any constant
factor at the expense of adding a fixed number of counters
Quantum counter automata
The question of whether quantum real-time one-counter automata (rtQ1CAs) can
outperform their probabilistic counterparts has been open for more than a
decade. We provide an affirmative answer to this question, by demonstrating a
non-context-free language that can be recognized with perfect soundness by a
rtQ1CA. This is the first demonstration of the superiority of a quantum model
to the corresponding classical one in the real-time case with an error bound
less than 1. We also introduce a generalization of the rtQ1CA, the quantum
one-way one-counter automaton (1Q1CA), and show that they too are superior to
the corresponding family of probabilistic machines. For this purpose, we
provide general definitions of these models that reflect the modern approach to
the definition of quantum finite automata, and point out some problems with
previous results. We identify several remaining open problems.Comment: A revised version. 16 pages. A preliminary version of this paper
appeared as A. C. Cem Say, Abuzer Yakary{\i}lmaz, and \c{S}efika
Y\"{u}zsever. Quantum one-way one-counter automata. In R\={u}si\c{n}\v{s}
Freivalds, editor, Randomized and quantum computation, pages 25--34, 2010
(Satellite workshop of MFCS and CSL 2010
Real-time multipushdown and multicounter automata networks and hierarchies
Ph.D.William I. Grosk
On efficient simulations of multicounter machines
An oblivious 1-tape Turing machine can simulate a multicounter machine on-line in linear time and logarithmic space. This leads to a linear cost combinational logic network implementing the first n steps of a multicounter machine and also to a linear time/logarithmic space on-line simulation by an oblivious logarithmic cost RAM. An oblivious log*n-head tape unit can simulate the first n steps of a multicounter machine in real-time, which leads to a linear cost combinational logic network with a constant data rate
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