A SiGe HEMT Mixer IC with Low Conversion Loss

The authors present the first SiGe HEMT mixer integrated circuit. The active mixer stage, operating up to 10GHz RF, has been designed and realized using a 0.1µ µµ µm gate length transistor technology. The design is based on a new large-signal simulation model developed for the SiGe HEMT. Good agreement between simulation and measurement is reached. The mixer exhibits 4.0dB and 4.7dB conversion loss when down-converting 3.0GHz and 6.0GHz signals, respectively, to an intermediate frequency of 500MHz using high-side injection of 5dBm local oscillator power. Conversion loss is less than 8dB for RF frequencies up to 10GHz with a mixer linearity of –8.8dBm input related 1dB compression point

ULTRA LOW POWER FSK RECEIVER AND RF ENERGY HARVESTER

This thesis focuses on low power receiver design and energy harvesting techniques as methods for intelligently managing energy usage and energy sources. The goal is to build an inexhaustibly powered communication system that can be widely applied, such as through wireless sensor networks (WSNs). Low power circuit design and smart power management are techniques that are often used to extend the lifetime of such mobile devices. Both methods are utilized here to optimize power usage and sources. RF energy is a promising ambient energy source that is widely available in urban areas and which we investigate in detail. A harvester circuit is modeled and analyzed in detail at low power input. Based on the circuit analysis, a design procedure is given for a narrowband energy harvester. The antenna and harvester co-design methodology improves RF to DC energy conversion efficiency. The strategy of co-design of the antenna and the harvester creates opportunities to optimize the system power conversion efficiency. Previous surveys have found that ambient RF energy is spread broadly over the frequency domain; however, here it is demonstrated that it is theoretically impossible to harvest RF energy over a wide frequency band if the ambient RF energy source(s) are weak, owing to the voltage requirements. It is found that most of the ambient RF energy lies in a series of narrow bands. Two different versions of harvesters have been designed, fabricated, and tested. The simulated and measured results demonstrate a dual-band energy harvester that obtains over 9% efficiency for two different bands (900MHz and 1800MHz) at an input power as low as -19dBm. The DC output voltage of this harvester is over 1V, which can be used to recharge the battery to form an inexhaustibly powered communication system. A new phase locked loop based receiver architecture is developed to avoid the significant conversion losses associated with OOK architectures. This also helps to minimize power consumption. A new low power mixer circuit has also been designed, and a detailed analysis is provided. Based on the mixer, a low power phase locked loop (PLL) based receiver has been designed, fabricated and measured. A power management circuit and a low power transceiver system have also been co-designed to provide a system on chip solution. The low power voltage regulator is designed to handle a variety of battery voltage, environmental temperature, and load conditions. The whole system can work with a battery and an application specific integrated circuit (ASIC) as a sensor node of a WSN network

A self-calibration circuit for a neural spike recording channel

This paper presents a self-calibration circuit for a neural spike recording channel. The proposed design tunes the bandwidth of the signal acquisition Band-Pass Filter (BPF), which suffers from process variations corners. It also performs the adjustment of the Programmable Gain Amplifier (PGA) gain to maximize the input voltage range of the analog-to-digital conversion. The circuit, which consists on a frequency-controlled signal generator and a digital processor, operates in foreground, is completely autonomous and integrable in an estimated area of 0.026mm 2 , with a power consumption around 450nW. The calibration procedure takes less than 250ms to select the configuration whose performance is closest to the required one.Ministerio de Ciencia e Innovación TEC2009-08447Junta de Andalucía TIC-0281

RF-DC power conversion of Schottky diode fabricated on AlGaAs/GaAs heterostructure for on-chip rectenna device application in nanosystems

The Schottky diodes enjoined with coplanar waveguides are investigated for applications in on-chip rectenna device applications without insertion of a matching circuit. The design, fabrication, DC characteristics and RF-to-DC conversion of the AlGaAs/GaAs HEMT Schottky diode is presented. The RF signals are well converted by the fabricated Schottky diodes with cut-off frequency up to 25 GHz estimated in direct injection experiments. The outcomes of these results provide conduit for breakthrough designs for ultra-low power on-chip rectenna device technology to be integrated in nanosystems

Design of multi-valued quaternary based analog-to-digital converter

Problem statement: The design of multi-valued quaternary based Analog-to-Digital Converter (ADC) circuit was presented. The ADC generates multi-valued logic outputs rather than the conventional binary output system to overall reduction in circuit complexity and size. Approach: Design was implemented using pipeline ADC architecture and was simulated using model parameters based on standard 0.13 µm CMOS process. Results: Performance analysis of the design showed desirable performance parameters in terms of response, low power consumption, and a sampling rate of 10 MHz at a supply voltage of 1.3V was achieved. Conclusion/Recommendations: The ADC design was suitable for the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design

Design of Low-Power Transmitter and Receiver Front End

This thesis focuses on the design of "RF front-end blocks" for the transmitter and receiver. The blocks include the low noise amplifier (LNA) and mixer downconversion at the receiving side, while the power amplifier includes the pre-driver circuit, and mixer up-conversion at the transmitter side. All of the blocks were designed in a 65nm design kit. The basics of these RF blocks are first described in chapters two to four. After that, the general principle of operations is then described and different topologies are discussed. In chapter 5 the proposed design is discussed. The proposed design is composed of a differential IDCS narrow band LNA, with a passive down-conversion mixer on the receiving side, designed for bluetooth low energy (BLE) applications, that operates at 2.4 GHz with a 1.2 V supply voltage. The overall conversion gain at the receiving side was found to be greater than 13 dB with a double side band noise figure of 8.3 dB having a 1 dB compression point of -11.8 dB, and with IIP3 of -2.06 dBm having a power consumption of 251 μwatts. On the transmission side, a power amplifier with a pre-driver circuit and a passive up-conversion mixer has been designed to operate at a 1.2 V supply at the frequency of operation 2.4 GHz, having overall gain of 24 dB with maximum power added efficiency of 34% when using maximum output power of 11 dBm. The Cadence virtuoso design kit was used for simulation. Additionally, the layout considerations were discussed, followed by presentation of the post-layout results and graphs, and, finally, some conclusions have been drawn

Power extraction from ambient vibration

Autonomous devices such as sensors for personal area networks need a long battery lifetime in a small volume. The battery size can be reduced by incorporating micro-power generators based on ambient energy. This paper describes a new approach to the conversion of mechanical to electrical energy, based on charge transportation between two parallel capacitors. The polarization of the device is handled by an electret. A largesignal model was developed, allowing simulations of the behavior of any circuit based on this generator for any mechanical input signal. A small-signal model was derived in order to quantify the output power as a function of the design parameters. A layout was made based on a standard SOI-technology, available in a MPW. With this layout it is possible to generate 100 mW at 1200 Hz

Resonance mode power supplies with power factor correction

There is an increasing need for AC-DC converters to draw a pure sinusoidal current at near unity power factor from the AC mains. Most conventional power factor correcting systems employ PWM techniques to overcome the poor power factor being presented to the mains. However, the need for smaller and lighter power processing equipment has motivated the use of higher internal conversion frequencies in the past. In this context, resonant converters are becoming a viable alternative to the conventional PWM controlled power supplies. The thesis presents the implementation of active power factor correction in power supplies, using resonance mode techniques. It reviews the PWM power factor correction circuit topologies previously used. The possibility of converting these PWM topologies to resonant mode versions is discussed with a critical assessment as to the suitability of the semiconductor switching devices available today for deployment in these resonant mode supplies. The thesis also provides an overview of the methods used to model active semiconductor devices. The computer modelling is done using the PSpice microcomputer simulation program. The modifications that are needed to the built in MOSFET model in PSpice, when modeling high frequency circuits is discussed. A new two transistor model which replicates the action of a OTO thyristor is also presented. The new model enables the designer to estimate the device parameters with ease by adopting a short calculation and graphical design procedure, based on the manufacturer's data sheets. The need for a converter with a high efficiency, larger power/weight ratio, high input power factor with reduced line current distortion and reduced cost has led to the development of a new resonant mode converter topology, for power processing. The converter presents a near resistive load to the mains thus ensuring a high input power factor, while providing a stabilised de voltage at the output with a small lOOHz ripple. The supply is therefore ideal for preregulation applications. A description of the modes of operation and the analysis of the power circuit are included in the thesis. The possibility of using the converter for low output voltage applications is also discussed. The design of a 300W, 80kHz prototype model of this circuit is presented in the thesis. The design of the isolation transformer and other magnetic components are described in detail. The selection of circuit components and the design and implementation of the variable frequency control loop are also discussed. An evaluation of the experimental and computer simulated results obtained from the prototype model are included in the presentation. The thesis further presents a zero-current switching quasi-resonant flyback circuit topology with power factor correction. The reasons for using this topology for off-line power conversion applications are discussed. The use of a cascoded combination of a bipolar power transistor and two power MOSFETs i~ the configuration has enabled the circuit to process moderate levels of power while simultaneously switching at high frequencies. This fulfils the fundamental precondition for miniaturisation. It also provides a well regulated DC output voltage with a very small ripple while maintaining a high input power factor. The circuit is therefore ideal for use in mobile applications. A preliminary design of the above circuit, its analysis using PSpice, the design of the control circuit, current limiting and overcurrent protection circuitry and the implementation of closed-loop control are all included in the thesis. The experimental results obtained from a bread board model is also presented with an evaluation of the circuit performance. The power factor correction circuit is finally installed in this supply and the overall converter performance is assessed