3,299 research outputs found
Cryogenic Neuromorphic Hardware
The revolution in artificial intelligence (AI) brings up an enormous storage
and data processing requirement. Large power consumption and hardware overhead
have become the main challenges for building next-generation AI hardware. To
mitigate this, Neuromorphic computing has drawn immense attention due to its
excellent capability for data processing with very low power consumption. While
relentless research has been underway for years to minimize the power
consumption in neuromorphic hardware, we are still a long way off from reaching
the energy efficiency of the human brain. Furthermore, design complexity and
process variation hinder the large-scale implementation of current neuromorphic
platforms. Recently, the concept of implementing neuromorphic computing systems
in cryogenic temperature has garnered intense interest thanks to their
excellent speed and power metric. Several cryogenic devices can be engineered
to work as neuromorphic primitives with ultra-low demand for power. Here we
comprehensively review the cryogenic neuromorphic hardware. We classify the
existing cryogenic neuromorphic hardware into several hierarchical categories
and sketch a comparative analysis based on key performance metrics. Our
analysis concisely describes the operation of the associated circuit topology
and outlines the advantages and challenges encountered by the state-of-the-art
technology platforms. Finally, we provide insights to circumvent these
challenges for the future progression of research
AI/ML Algorithms and Applications in VLSI Design and Technology
An evident challenge ahead for the integrated circuit (IC) industry in the
nanometer regime is the investigation and development of methods that can
reduce the design complexity ensuing from growing process variations and
curtail the turnaround time of chip manufacturing. Conventional methodologies
employed for such tasks are largely manual; thus, time-consuming and
resource-intensive. In contrast, the unique learning strategies of artificial
intelligence (AI) provide numerous exciting automated approaches for handling
complex and data-intensive tasks in very-large-scale integration (VLSI) design
and testing. Employing AI and machine learning (ML) algorithms in VLSI design
and manufacturing reduces the time and effort for understanding and processing
the data within and across different abstraction levels via automated learning
algorithms. It, in turn, improves the IC yield and reduces the manufacturing
turnaround time. This paper thoroughly reviews the AI/ML automated approaches
introduced in the past towards VLSI design and manufacturing. Moreover, we
discuss the scope of AI/ML applications in the future at various abstraction
levels to revolutionize the field of VLSI design, aiming for high-speed, highly
intelligent, and efficient implementations
FPGAs in Industrial Control Applications
The aim of this paper is to review the state-of-the-art of Field Programmable Gate Array (FPGA) technologies and their contribution to industrial control applications. Authors start by addressing various research fields which can exploit the advantages of FPGAs. The features of these devices are then presented, followed by their corresponding design tools. To illustrate the benefits of using FPGAs in the case of complex control applications, a sensorless motor controller has been treated. This controller is based on the Extended Kalman Filter. Its development has been made according to a dedicated design methodology, which is also discussed. The use of FPGAs to implement artificial intelligence-based industrial controllers is then briefly reviewed. The final section presents two short case studies of Neural Network control systems designs targeting FPGAs
Benchmarking and modeling of analog and digital SRAM in-memory computing architectures
In-memory-computing is emerging as an efficient hardware paradigm for deep
neural network accelerators at the edge, enabling to break the memory wall and
exploit massive computational parallelism. Two design models have surged:
analog in-memory-computing (AIMC) and digital in-memory-computing (DIMC),
offering a different design space in terms of accuracy, efficiency and dataflow
flexibility. This paper targets the fair comparison and benchmarking of both
approaches to guide future designs, through a.) an overview of published
architectures; b.) an analytical cost model for energy and throughput; c.)
scheduling of workloads on a variety of modeled IMC architectures for
end-to-end network efficiency analysis, offering valuable workload-hardware
co-design insights
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