PERFORMANCE EVALUATION OF SWITCHED-DIODE SYMMETRIC, ASYMMETRIC AND CASCADE MULTILEVEL CONVERTER TOPOLOGIES: A CASE STUDY

In this paper, a precise study is presented on switched-diode symmetric, asymmetric and cascade multilevel converter topologies, which have been introduced and published recently. According to the published papers, these topologies have many advantages over other topologies in the same class. However, it is proved here that the mentioned switched-diode topologies suffer from main problems, which make them completely impractical. First, a brief study is presented on a typical sub-multilevel converter that consists of a basic unit and an H-bridge converter. Then, extended inverter topologies based on the switched-diode basic unit and their problems are studied. It is revealed in this section that the main problem is because of the basic unit. Finally, comprehensive experimental and simulation results are presented to validate the analysis. The simulations have been performed in MATLAB/SIMULINK environment

Design, Optimization and Implementation of a High Frequency Link Multilevel Cascaded Inverter

This thesis presents a new concept of cascaded MLI (CMLI) device reduction by utilizing low and high frequency transformer link. Two CMLI topologies, symmetric and asymmetric are proposed. Compared with counterpart CMLI topologies available in the literatures, the proposed two inverter topologies in this thesis have the advantages of utilizing least number of electronic components without compromising overall performance particularly when a high number of levels is required in the output voltage waveform

Design and Hardware Implementation Considerations of Modified Multilevel Cascaded H-Bridge Inverter for Photovoltaic System

Inverters are an essential part in many applications including photovoltaic generation. With the increasing penetration of renewable energy sources, the drive for efficient inverters is gaining more and more momentum. In this paper, output power quality, power loss, implementation complexity, cost, and relative advantages of the popular cascaded multilevel H-bridge inverter and a modified version of it are explored. An optimal number of levels and the optimal switching frequency for such inverters are investigated, and a five-level architecture is chosen considering the trade-offs. This inverter is driven by level shifted in-phase disposition pulse width modulation technique to reduce harmonics, which is chosen through deliberate testing of other advanced disposition pulse width modulation techniques. To reduce the harmonics further, the application of filters is investigated, and an LC filter is applied which provided appreciable results. This system is tested in MATLAB/Simulink and then implemented in hardware after design and testing in Proteus ISIS. The general cascaded multilevel H-bridge inverter design is also implemented in hardware to demonstrate a novel low-cost MOSFET driver build for this study. The hardware setups use MOSFETs as switching devices and low-cost ATmega microcontrollers for generating the switching pulses via level shifted in-phase disposition pulse width modulation. This implementation substantiated the effectiveness of the proposed design

Development of Novel Multilevel Inverter with Reduced Power Switches

In recent days the usage of multilevel inverters became very essential and crucial especially on high power consuming sites. The advantages on the modularity, failure management, reliability and the waveform with less harmonic distortion at the output made the multilevel inverter to gain more attention in the current industry. Even though, multilevel inverters serving the industry with more significant advantages however they do have drawbacks such the usage of high number of power switches in their circuit and this leads to high manufacturing cost and also increase the complexity of the circuit structure. In this paper a new 9 level multilevel inverter topology has been analyzed. The proposed topology has considered factors such as reducing the power switches, reducing the total harmonic distortion and reducing the complexity of the structure

Cascaded Converters For Integration And Management Of Grid Level Energy Storage Systems

ABSTRACT CASCADED CONVERTERS FOR INTEGRATION AND MANAGEMENT OF GRID-LEVEL ENERGY STORAGE SYSTEMS by ZUHAIR ALAAS December 2017 Advisor: Dr. Caisheng Wang Major: ELECTRICAL ENGINEERING Degree: Doctor of Philosophy This research work proposes two cascaded multilevel inverter structures for BESS. The gating and switching control of switching devices in both inverter typologies are done by using a phase-shifted PWM scheme. The first proposed isolated multilevel inverter is made up of three-phase six-switch inverter blocks with a reduced number of power components compared with traditional isolated CHB. The suggested isolated converter has only one battery string for three-phase system that can be used for high voltage and high power applications such as grid connected BESS and alternative energy systems. The isolated inverter enables dq frame based simple control and eliminates the issues of single-phase pulsating power, which can cause detrimental impacts on certain dc sources. Simulation studies have been carried out to compare the proposed isolated multi-level inverter with an H-bridge cascaded transformer inverter. The simulation results verified the performance of the isolated inverter. The second proposed topology is a Hierarchal Cascaded Multilevel Converter (HCMC) with phase to phase SOC balancing capability which also for high voltage and high power battery energy storage systems. The HCMC has a hybrid structure of half-bridge converters and H-bridge inverters and the voltage can be hierarchically cascaded to reach the desired value at the half-bridge and the H-bridge levels. The uniform SOC battery management is achieved by controlling the half-bridge converters that are connected to individual battery modules/cells. Simulation studies and experimental results have been carried on a large scale battery system under different operating conditions to verify the effectiveness of the proposed inverters. Moreover, this dissertation presents a new three-phase SOC equalizing circuit, called six-switch energy-level balancing circuit (SSBC), which can be used to realize uniform SOC operation for full utilization of the battery capacity in proposed HCMC or any CMI inverter while keeping balanced three-phase operation. A sinusoidal PWM modulation technique is used to control power transferring between phases. Simulation results have been carried out to verify the performance of the proposed SSBC circuit of uniform three-phase SOC balancing

Symmetric Multi-Level Boost Inverter with Single DC Source Using Reduced Number of Switches

In this paper a novel multilevel boost DC to DC converter with H-Bridge inverter circuit for single DC source is proposed. The proposed scheme has two stages: the first one is a multilevel boost converter which gives a multilevel dc output for a single dc source and the second level is a H-Bridge converter which converts multilevel DC to multilevel AC at required frequency. This DC-DC converter not only reduces the DC source but also reduces the switches, diodes and capacitors. This leads to decrease of the amount and the inverter space installation in order to increase the required output voltage by increasing the number of capacitors and diodes in the DC to DC converter. Comparison between the number of power switches for the suggested topology and other topologies in the recent literature is presented. Simulation results are conveyed through MatLAB/Simulink domain and the working of the suggested converter is realized

Switched capacitor based multi-level boost inverter for smart grid applications

To link DC power sources to an AC grid, converters are needed. Inverters are the power electronic devices, which are used for this purpose. Conventional inverters employ harmonic filters and transformers that are lossy and expensive. Multilevel inverters (MLIs) are an alternative to conventional ones, proposing reduced total harmonic distortion (THD), increased range of control, and inductor-less design. They generate a stepped waveform, with close similarity to a sine wave. Many distributed sources may be employed in a smart grid. If those sources have minimal THD, the filtering process could be reduced at the point of common coupling. This paper presents two switched capacitor based MLIs, proposing boost capability and low THD. Inverters have inherent charge balancing capability, which eliminates the need for auxiliary circuits and voltage sensors. Inverters switches are modulated using phase opposition disposition pulse-width modulation (PODPWM) method that ease the balancing of the voltage and decrease the losses of switching. Designs were verified by simulation and the output waveforms were introduced

A new switched DC –link capacitor based multilevel converter (SDC2MLC)

At present, one of the most common techniques for high power conversion in medium voltage applications is the use of cascaded multilevel converters. In this article, a new Switched DC-Link Capacitor Multilevel converter (SDC2MLC) with considerably few numbers of power electronics switches (IGBTs) is proposed, where keeping the total harmonic distortion (THD) of the output voltage waveforms as low as possible is desired. The proposed topology is configured using two separate basic units. Each unit consists of four switches with a series-parallel combination of isolated DC sources. The performance of the presented topology for both configurations is described. The required number of switches, power diodes, gate driver circuits and voltage stresses across the switches are compared with those of other recent published techniques. Furthermore, operation and performance of the proposed SDC2MLC are illustrated with the aid of experimental results of a single-phase 11-level converter to clarify the viability of the proposed topology

Recently Developed Reduced Switch Multilevel Inverter for Renewable Energy Integration and Drives Application: Topologies, Comprehensive Analysis and Comparative Evaluation

Recently, multilevel inverters (MLIs) have gained lots of interest in industry and academia, as they are changing into a viable technology for numerous applications, such as renewable power conversion system and drives. For these high power and high/medium voltage applications, MLIs are widely used as one of the advanced power converter topologies. To produce high-quality output without the need for a large number of switches, development of reduced switch MLI (RS MLI) topologies has been a major focus of current research. Therefore, this review paper focuses on a number of recently developed MLIs used in various applications. To assist with advanced current research in this field and in the selection of suitable inverter for various applications, significant understanding on these topologies is clearly summarized based on the three categories, i.e., symmetrical, asymmetrical, and modified topologies. This review paper also includes a comparison based on important performance parameters, detailed technical challenges, current focus, and future development trends. By a suitable combination of switches, the MLI produces a staircase output with low harmonic distortion. For a better understanding of the working principle, a single-phase RS MLI topology is experimentally illustrated for different level generation using both fundamental and high switching frequency techniques which will help the readers to gain the utmost knowledge for advance research