526 research outputs found

    Low‐Frequency Noise and Resistance as Reliability Indicators of Mechanically and Electrically Strained Thick‐Film Resistors

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    New contemporary applications of thick resistive films are inducing the need to investigate their behaviour under various stressing conditions. On the other hand, there is a growing interest in noise measurements as means of thick‐film resistor quality and reliability evaluation and evaluation of degradation under stress. For these reasons, this chapter presents effects of mechanical, electrical and simultaneous mechanical and electrical straining on performances of conventional thick‐film resistors that are analysed from micro‐ and macro‐structural, charge transport and low‐frequency noise aspects

    Thick‐Film Resistor Failure Analysis Based on Low‐Frequency Noise Measurements

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    The chapter aims to present research results in the field of thick‐film resistor failure analysis based on standard resistance and low‐frequency noise measurements. Noise spectroscopy–based analysis establishes correlation between noise parameters and parameters of noise sources in these heterogeneous nanostructures. Validity of the presented model is verified experimentally for resistors operating under extreme working conditions. For the experimental purposes, thick‐film resistors of different sheet resistances and geometries, realized using commercially available thick‐film resistor compositions, were subjected to high‐voltage pulse (HVP) stressing. The obtained experimental results are qualitatively analysed from microstructure, charge transport mechanism and low‐frequency noise aspects. Correlation between resistance and low‐frequency noise changes with resistor degradation and failure due to high‐voltage pulse stressing is observed

    Realization of fully distributed RC networks using thick film technology

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    The problems associated with the fabrication of Fully Distributed RC (FDRC) networks using thick film techniques have been discussed. Also, a comprehensive investigation into the fabrication of fully distributed RC networks has been carried out in which a series of resistor-dielectric ink combinations were examined for compatibility. The investigations resulted in the successful fabrication of thick film FDRC devices. It must be mentioned, however, that the conventional methods of trimming could not be used in view of the fact that the first resistor layer of the FDRC network is completely covered with a layer of dielectric and that the physical shape and size of the distributed network should not be changed by trimming. The high voltage pulse trimming technique was therefore examined in detail since it neither required accessibility to the surface of the resistor nor did it change the physical shape of the resistors. A suitable electronic circuit was designed for this purpose and was used to adjust the values of several fully distributed RC components. The manufactured thick film FDRC devices was examined in various electronic networks such as multivibrators, phase shift oscillators and active filters with successful results

    Semiconductor Device Modeling, Simulation, and Failure Prediction for Electrostatic Discharge Conditions

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    Electrostatic Discharge (ESD) caused failures are major reliability issues in IC industry. Device modeling for ESD conditions is necessary to evaluate ESD robustness in simulation. Although SPICE model is accurate and efficient for circuit simulations in most cases, devices under ESD conditions operate in abnormal status. SPICE model cannot cover the device operating region beyond normal operation. Thermal failure is one of the main reasons to cause device failure under ESD conditions. A compact model is developed to predict thermal failure with circuit simulators. Instead of considering the detailed failure mechanisms, a failure temperature is introduced to indicate device failure. The developed model is implemented by a multiple-stage thermal network. P-N junction is the fundamental structure for ESD protection devices. An enhanced diode model is proposed and is used to simulate the device behaviors for ESD events. The model includes all physical effects for ESD conditions, which are voltage overshoot, self-heating effect, velocity saturation and thermal failure. The proposed model not only can fit the I-V and transient characteristics, but also can predict failure for different pulses. Safe Operating Area (SOA) is an important factor to evaluate the LDMOS performance. The transient SOA boundary is considered as power-defined. By placing the failure monitor under certain conditions, the developed modeling methodology can predict the boundary of transient SOA for any short pulse stress conditions. No matter failure happens before or after snapback phenomenon. Weibull distribution is popular to evaluate the dielectric lifetime for CVS. By using the transformative version of power law, the pulsing stresses are converted into CVS, and TDDB under ESD conditions for SiN MIMCAPs is analyzed. The thickness dependency and area independency of capacitor breakdown voltage is observed, which can be explained by the constant ?E model instead of conventional percolation model

    Particle detection experiment for Applications Technology Satellite 1 /ATS-1/ Final report

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    Applications technology satellite particle detection experiment for measuring energy spectra of earth magnetic fiel

    Proceedings of the 1977 NASA/ISHM Microelectronics Conference

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    Current and future requirements for research, development, manufacturing and education in the field of hybrid microelectronic technology were discussed

    Investigation of bolometric and resistive properties of nickel oxide

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    This work investigates the properties of nickel oxide for use in microbolometric and resistive memory applications. For the uncooled infrared radiation detector industry, the current standard sensor materials are either very expensive, but very sensitive (vanadium oxide), or the other extreme of low cost, and low quality (amorphous silicon). Thus, a need arises for a medium-grade, medium-cost microbolometer sensitive material. The physical scaling limits of conventional charge-based non-volatile memory has progressed the semiconductor industry into searching for a new type of non-volatile memory device. Resistive random access memory (ReRAM) shows promise to fill this void, and nickel oxide presents itself as a potential forerunner in this market by demonstrating its ability to switch from a high resistance state to a low resistance state. A die with microbolometer devices and metal-insulator-metal (MIM) structures was designed and fabricated, with nickel oxide as the infrared-sensitive and resistance-switching material respectively. Two methods of obtaining nickel oxide were investigated - plasma oxidation and thermal oxidation. Ellipsometry, X-ray diffraction, transmission electron microscopy, and energy dispersive X-ray spectroscopy were used to study the films created using the two techniques. Thermally grown nickel oxide was used for the fabrication of the bolometer and MIM devices, which were subsequently electrically tested to observe their performance and evaluate the viability of nickel oxide for use in these applications. Thermal nickel oxide successfully demonstrated its viability for both applications

    Retention and application of Skylab experiences to future programs

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    The problems encountered and special techniques and procedures developed on the Skylab program are described along with the experiences and practical benefits obtained for dissemination and use on future programs. Three major topics are discussed: electrical problems, mechanical problems, and special techniques. Special techniques and procedures are identified that were either developed or refined during the Skylab program. These techniques and procedures came from all manufacturing and test phases of the Skylab program and include both flight and GSE items from component level to sophisticated spaceflight systems

    Current transient phenomena in silicon oxide resistance switching oxides: characterisation and computational applications

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    The current transient phenomenon is a current-time response observed in metal-insulator-metal devices, such as defective capacitors or resistance switching devices. It is a response easily identified by its rapid increase in device current followed by a slow decay, resulting in an iconic peak in device current which has historically played a key role in the analysis of current transients. Whilst the transient has mostly been interpreted as a defect to be mitigated against, it has also been used to determine properties of the oxide such as oxygen vacancy mobilities. This application of the current transient is derived from the space charge limited current (SCLC) theory which is used to explain the phenomenon’s origin. However, in this thesis I demonstrate that the SCLC model fails to hold up under scrutiny in the context of silicon oxide-based devices; a finding which is in line with inconsistencies already present within the current body of literature. I use a range of electronic and optical characterisation methods to demonstrate the current transient is the result of two changes occurring in the device each driven by different forces. This finding has significant implications on the use of the SCLC model and the act of determining mobilities from the current transient’s peak. In response, I develop a comprehensive characterisation methodology to gain a deeper insight into the current transient’s causes and propose alternative models that could potentially explain the behaviour in silicon oxide devices more accurately. Finally, I attempt to reframe the current transient not as a defect to be mitigated but as a computational tool to be used. With a deeper understanding of the current transient’s mechanics, I apply it to the problem of edge detection of images and comment on its potential to implement homeostatic behaviours in bio-inspired circuits

    Doped Metal Oxide High-K Gate Dielectric for Nonvolatile Memory and Light Emitting Applications

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    The zirconium-doped hafnium oxide (ZrHfO) high-k thin film has excellent gate dielectric properties, such as a higher crystallization temperature, a lower defect density, and a larger effective k value. As a promising high-k material, ZrHfO has been utilized for both nonvolatile memory (NVM) and light emitting applications. Replacing the polycrystalline Si floating gate, the discrete nanocrystals embedded ZrHfO gate dielectric can achieve promising NVM performance. On the other hand, warm white light can be emitted from the thermal excitation of nano-resistors form from the dielectric breakdown of the ZrHfO Metal-Oxide-Semiconductor (MOS) capacitor. This novel solid state incandescent light emitting device (SSI-LED) unveils a new concept for the lighting device evolution. Nanocrystalline cadmium sulfide (nc-CdS) embedded ZrHfO high-k NVMs have been fabricated to reduce the frequency dispersion problem caused by defects at the nanocrystal/dielectric interface. The nc-CdS embedded device can retain about 53% of originally trapped holes for 10 years and exhibit outstanding memory function at low operation voltage. The study on the nc-CdSe embedded ZrHfO NVMs shows that the high temperature enhances the hole trapping but decreases the electron trapping. Based on the different temperature dependences, the stored electrons release faster than stored holes. The raised temperature accelerates the dielectric breakdown process by increasing defect densities and defect effective conduction radii. The post deposition annealing (PDA) atmosphere is critical to the electrical and light emission characteristics of ZrHfO SSI-LEDs. It affects the dielectric breakdown, light emission intensity and efficiency by changing compositions of the high-k stack and the nano-resistor. The electrical properties, i.e., effective resistances and Schottky barrier heights of nano-resistors have been estimated. The nano-resistor behaves neither like a conductor nor like a semiconductor. Moreover, the barrier height inhomogeneity is observed due to the random and complicated nano-resistor formation. The embedding method and the heavily doped p-Si substrate have been employed to enhance the light emission from ZrHfO SSI-LEDs. Lastly, extensive applications of this novel nano-resistor device for on-chip optical interconnects and as diode-like anti-fuses have been discussed
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