567 research outputs found
Fast LTL Satisfiability Checking by SAT Solvers
Satisfiability checking for Linear Temporal Logic (LTL) is a fundamental step
in checking for possible errors in LTL assertions. Extant LTL satisfiability
checkers use a variety of different search procedures. With the sole exception
of LTL satisfiability checking based on bounded model checking, which does not
provide a complete decision procedure, LTL satisfiability checkers have not
taken advantage of the remarkable progress over the past 20 years in Boolean
satisfiability solving. In this paper, we propose a new LTL
satisfiability-checking framework that is accelerated using a Boolean SAT
solver. Our approach is based on the variant of the \emph{obligation-set
method}, which we proposed in earlier work. We describe here heuristics that
allow the use of a Boolean SAT solver to analyze the obligations for a given
LTL formula. The experimental evaluation indicates that the new approach
provides a a significant performance advantage
Lazy Probabilistic Model Checking without Determinisation
The bottleneck in the quantitative analysis of Markov chains and Markov
decision processes against specifications given in LTL or as some form of
nondeterministic B\"uchi automata is the inclusion of a determinisation step of
the automaton under consideration. In this paper, we show that full
determinisation can be avoided: subset and breakpoint constructions suffice. We
have implemented our approach---both explicit and symbolic versions---in a
prototype tool. Our experiments show that our prototype can compete with mature
tools like PRISM.Comment: 38 pages. Updated version for introducing the following changes: -
general improvement on paper presentation; - extension of the approach to
avoid full determinisation; - added proofs for such an extension; - added
case studies; - updated old case studies to reflect the added extensio
Sampling-Based Temporal Logic Path Planning
In this paper, we propose a sampling-based motion planning algorithm that
finds an infinite path satisfying a Linear Temporal Logic (LTL) formula over a
set of properties satisfied by some regions in a given environment. The
algorithm has three main features. First, it is incremental, in the sense that
the procedure for finding a satisfying path at each iteration scales only with
the number of new samples generated at that iteration. Second, the underlying
graph is sparse, which guarantees the low complexity of the overall method.
Third, it is probabilistically complete. Examples illustrating the usefulness
and the performance of the method are included.Comment: 8 pages, 4 figures; extended version of the paper presented at IROS
201
Platform Dependent Verification: On Engineering Verification Tools for 21st Century
The paper overviews recent developments in platform-dependent explicit-state
LTL model checking.Comment: In Proceedings PDMC 2011, arXiv:1111.006
A Multi-Core Solver for Parity Games
We describe a parallel algorithm for solving parity games,\ud
with applications in, e.g., modal mu-calculus model\ud
checking with arbitrary alternations, and (branching) bisimulation\ud
checking. The algorithm is based on Jurdzinski's Small Progress\ud
Measures. Actually, this is a class of algorithms, depending on\ud
a selection heuristics.\ud
\ud
Our algorithm operates lock-free, and mostly wait-free (except for\ud
infrequent termination detection), and thus allows maximum\ud
parallelism. Additionally, we conserve memory by avoiding storage\ud
of predecessor edges for the parity graph through strictly\ud
forward-looking heuristics.\ud
\ud
We evaluate our multi-core implementation's behaviour on parity games\ud
obtained from mu-calculus model checking problems for a set of\ud
communication protocols, randomly generated problem instances, and\ud
parametric problem instances from the literature.\ud
\u
GPU Accelerated counterexample generation in LTL model checking
Strongly Connected Component (SCC) based searching is one of the most popular LTL model checking algorithms. When the SCCs are huge, the counterexample generation process can be time-consuming, especially when dealing with fairness assumptions. In this work, we propose a GPU accelerated counterexample generation algorithm, which improves the performance by parallelizing the Breadth First Search (BFS) used in the counterexample generation. BFS work is irregular, which means it is hard to allocate resources and may suffer from imbalanced load. We make use of the features of latest CUDA Compute Architecture-NVIDIA Kepler GK110 to achieve the dynamic parallelism and memory hierarchy so as to handle the irregular searching pattern in BFS.We build dynamic queue management, task scheduler and path recording such that the counterexample generation process can be completely finished by GPU without involving CPU. We have implemented the proposed approach in PAT model checker. Our experiments show that our approach is effective and scalable. ?Springer International Publishing Switzerland 2014.EI0413-429882
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