13 research outputs found

    USRP N210 FPGA Loop Back System

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    The USRP™ (Universal Software Radio Peripheral), provides users worldwide to address a broad range of research, industrial, academic and defense applications. The Universal Software Radio Peripheral is developed for RF application, and provides options for GPS Disciplined Synchronization, MIMO configurations and embedded systems. Ettus Research introduced number of USRPs with different FPGA in it. Different USRP have different FPGA but they have similar TX and RX chain in it. Day by day Ettus research provide USRP with large FPGA and FPGA codes open so that users can implement their own modules in FPGA and test it. This paper focused on USRP N210 having Xilinx Spartan 3A DSP FPGA. In USRP 1 they provide loopback system but in current USRP no loopback available. If loopback is available then user can test their module at two stage: 1) after ADC/DAC module and 2) after DDC/DUC module. This paper describes the loopback system at two different stage: 1) after ADC/DAC and 2) after DDC/DUC in USRP N210 FPGA. DOI: 10.17762/ijritcc2321-8169.15056

    Power Budgets for CubeSat Radios to Support Ground Communications and Inter-Satellite Links

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    CubeSats are a class of pico-satellites that have emerged over the past decade as a cost-effective alternative to the traditional large satellites to provide space experimentation capabilities to universities and other types of small enterprises, which otherwise would be unable to carry them out due to cost constraints. An important consideration when planning CubeSat missions is the power budget required by the radio communication subsystem, which enables a CubeSat to exchange information with ground stations and/or other CubeSats in orbit. The power that a CubeSat can dedicate to the communication subsystem is limited by the hard constraints on the total power available, which are due to its small size and light weight that limit the dimensions of the CubeSat power supply elements (batteries and solar panels). To date, no formal studies of the communications power budget for CubeSats are available in the literature, and this paper presents a detailed power budget analysis that includes communications with ground stations as well as with other CubeSats. For ground station communications we outline how the orbital parameters of the CubeSat trajectory determine the distance of the ground station link and present power budgets for both uplink and downlink that include achievable data rates and link margins. For inter-satellite communications we study how the slant range determines power requirements and affects the achievable data rates and link margins

    Development of a Nanosatellite Software Defined Radio Communications System

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    Communications systems designed with application-specific integrated circuit (ASIC) technology suffer from one very significant disadvantage - the integrated circuits do not possess the ability of programmability. However, Software Defined Radio’s (SDR’s) integrated with Field Programmable Gate Arrays (FPGA) provide an opportunity to update the communication system on nanosatellites (which are physically difficult to access) due to their capability of performing signal processing in software. SDR signal processing is performed in software on reprogrammable elements such as FPGA’s. Applying this technique to nanosatellite communications systems will optimize the operations of the hardware, and increase the flexibility of the system. In this research a transceiver algorithm for a nanosatellite software defined radio communications is designed. The developed design is capable of modulation of data to transmit information and demodulation of data to receive information. The transceiver algorithm also works at different baud rates. The design implementation was successfully tested with FPGA-based hardware to demonstrate feasibility of the transceiver design with a hardware platform suitable for SDR implementation

    Analysis and Implementation of Communications Systems for Small Satellite Missions

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    Nano satellites are becoming more and more popular space platforms due to their relatively low cost. Constellations of many of these small satellites are being launched for scientific and research purposes. This thesis has examined implementing a communications system for small satellites that can be used to maintain constant contact with satellites as they orbit the Earth. It analyzes the various components of a small satellite and how they integrate. It then discusses the different abstraction layers that will be required in order to support the same software architecture across various types of hardware. An orbital analysis was performed to define the requirements for acquisition and loss of signal. Due to the ever increasing threat from space debris, a simulation using a high performance computing system to determine satellite threats was conducted. The thesis concludes with a communications analysis followed by a case study

    Software Defined Radio Implementation Of Ds-Cdma In Inter-Satellite Communications For Small Satellites

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    The increased usage of CubeSats recently has changed the communication philosophy from long-range point-to-point propagations to a multi-hop network of small orbiting nodes. Separating system tasks into many dispersed satellites can increase system survivability, versatility, configurability, adaptability, and autonomy. Inter-satellite links (ISL) enable the satellites to exchange information and share resources while reducing the traffic load to the ground. Establishment and stability of the ISL are impacted by factors such as the satellite orbit and attitude, antenna configuration, constellation topology, mobility, and link range. Software Defined Radio (SDR) is beginning to be heavily used in small satellite communications for applications such as base stations. A software-defined radio is a software program that does the functionality of a hardware system. The digital signal processing blocks are incorporated into the software giving it more flexibility and modulation. With this, the idea of a remote upgrade from the ground as well as the potential to accommodate new applications and future services without hardware changes is very promising. Realizing this, my idea is to create an inter-satellite link using software defined radio. The advantages of this are higher data rates, modification of operating frequencies, possibility of reaching higher frequency bands for higher throughputs, flexible modulation, demodulation and encoding schemes, and ground modifications. However, there are several challenges in utilizing the software-defined radio to create an inter-satellite link communication for small satellites. In this paper, we designed and implemented a multi-user inter-satellite communication network using SDRs, where Code Division Multiple Access (CDMA) technique is utilized to manage the multiple accesses to shared communication channel among the satellites. This model can be easily reconfigured to support any encoding/decoding, modulation, and other signal processing schemes

    Overcoming CubeSat downlink limits with VITAMIN: a new variable coded modulation protocol

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    Thesis (M.S.) University of Alaska Fairbanks, 2013Many space missions, including low earth orbit CubeSats, communicate in a highly dynamic environment because of variations in geometry, weather, and interference. At the same time, most missions communicate using fixed channel codes, modulations, and symbol rates, resulting in a constant data rate that does not adapt to the dynamic conditions. When conditions are good, the fixed date rate can be far below the theoretical maximum, called the Shannon limit; when conditions are bad, the fixed data rate may not work at all. To move beyond these fixed communications and achieve higher total data volume from emerging high-tech instruments, this thesis investigates the use of error correcting codes and different modulations. Variable coded modulation (VCM) takes advantage of the dynamic link by transmitting more information when the signal-to-noise ratio (SNR) is high. Likewise, VCM can throttle down the information rate when SNR is low without having to stop all communications. VCM outperforms fixed communications which can only operate at a fixed information rate as long as a certain signal threshold is met. This thesis presents a new VCM protocol and tests its performance in both software and hardware simulations. The protocol is geared towards CubeSat downlinks as complexity is focused in the receiver, while the transmission operations are kept simple. This thesis explores bin-packing as a way to optimize the selection of VCM modes based on expected SNR levels over time. Working end-to-end simulations were created using MATLAB and LabVIEW, while the hardware simulations were done with software defined radios. Results show that a CubeSat using VCM communications will deliver twice the data throughput of a fixed communications system

    Software Defined Radio Implementation Of Ds-Cdma In Inter-Satellite Communications For Small Satellites

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    The increased usage of CubeSats recently has changed the communication philosophy from long-range point-to-point propagations to a multi-hop network of small orbiting nodes. Separating system tasks into many dispersed satellites can increase system survivability, versatility, configurability, adaptability, and autonomy. Inter-satellite links (ISL) enable the satellites to exchange information and share resources while reducing the traffic load to the ground. Establishment and stability of the ISL are impacted by factors such as the satellite orbit and attitude, antenna configuration, constellation topology, mobility, and link range. Software Defined Radio (SDR) is beginning to be heavily used in small satellite communications for applications such as base stations. A software-defined radio is a software program that does the functionality of a hardware system. The digital signal processing blocks are incorporated into the software giving it more flexibility and modulation. With this, the idea of a remote upgrade from the ground as well as the potential to accommodate new applications and future services without hardware changes is very promising. Realizing this, my idea is to create an inter-satellite link using software defined radio. The advantages of this are higher data rates, modification of operating frequencies, possibility of reaching higher frequency bands for higher throughputs, flexible modulation, demodulation and encoding schemes, and ground modifications. However, there are several challenges in utilizing the software-defined radio to create an inter-satellite link communication for small satellites. In this paper, we designed and implemented a multi-user inter-satellite communication network using SDRs, where Code Division Multiple Access (CDMA) technique is utilized to manage the multiple accesses to shared communication channel among the satellites. This model can be easily reconfigured to support any encoding/decoding, modulation, and other signal processing schemes

    Software-Defined Radio FPGA Cores: Building towards a Domain-Specific Language

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    This paper reports on the design and implementation of an open-source library of parameterizable and reusable Hardware Description Language (HDL) Intellectual Property (IP) cores designed for the development of Software-Defined Radio (SDR) applications that are deployed on FPGA-based reconfigurable computing platforms. The library comprises a set of cores that were chosen, together with their parameters and interfacing schemas, based on recommendations from industry and academic SDR experts. The operation of the SDR cores is first validated and then benchmarked against two other cores libraries of a similar type to show that our cores do not take much more logic elements than existing cores and that they support a comparable maximum clock speed. Finally, we propose our design for a Domain-Specific Language (DSL) and supporting tool-flow, which we are in the process of building using our SDR library and the Delite DSL framework. We intend to take this DSL and supporting framework further to provide a rapid prototyping system for SDR application development to programmers not experienced in HDL coding. We conclude with a summary of the main characteristics of our SDR library and reflect on how our DSL tool-flow could assist other developers working in SDR field

    Applications for FPGA's on Nanosatellites

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    This thesis examines the feasibility of using a Field Programmable Gate Array (FPGA) based design on-board a CubeSat-sized nanosatellite. FPGAs are programmable logic devices that allow for the implementation of custom digital hardware on a single Integrated Circuit (IC). By using these FPGAs in spacecraft, more efficient processing can be done by moving the design onto hardware. A variety of different FPGA-based designs are looked at, including a Watchdog Timer (WDT), a Global Positioning System (GPS) receiver, and a camera interface

    RHINO software-defined radio processing blocks

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    This MSc project focuses on the design and implementation of a library of parameterizable, modular and reusable Digital IP blocks designed around use in Software-Defined Radio (SDR) applications and compatibility with the RHINO platform. The RHINO platform has commonalities with the better known ROACH platform, but it is a significantly cut-down and lowercost alternative which has similarities in the interfacing and FPGA/Processor interconnects of ROACH. The purpose of the library and design framework presented in this work aims to alleviate some of the commercial, high cost and static structure concerns about IP cores provided by FPGA manufactures and third-party IP vendors. It will also work around the lack of parameters and bus compatibility issues often encountered when using the freely available open resources. The RHINO hardware platform will be used for running practical applications and testing of the blocks. The HDL library that is being constructed is targeted towards both novice and experienced low-level HDL developers who can download and use it for free, and it will provide them experience of using IP Cores that support open bus interfaces in order to exploit SoC design without commercial, parameter and bus compatibility limitations. The provided modules will be of particularly benefit to the novice developers in providing ready-made examples of processing blocks, as well as parameterization settings for the interfacing blocks and associated RF receiver side configuration settings; all together these examples will help new developers establish effective ways to build their own SDR prototypes using RHINO
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