The Design and Linearization of 60GHz Injection Locked Power Amplifier

The RF power amplifier is one of the most critical blocks of transceivers, as it is expected to provide a suitable output power with high gain, efficiency and linearity. In this paper, a 60-GHz power amplifier based on an injection locked structure is demonstrated in a standard 65 CMOS technology. The PA core consists of a cross-coupled pair of NMOS transistors with an NMOS current source. This structure can achieve large output power and high PAE, but with poor linearity performance. In order to improve the linearity, several linearization techniques are investigated, including adaptive biasing and predistortion. The results show that the adaptive biasing technique can enlarge the linear operation region, but results in poor AM-PM performance. By instead using the predistortion technique, the AM-PM performance can be improved, but the linear region only extends slightly. Considering theses two techniques different advantages, we combine them together to improve not only the linear region but also the AM-PM performance. Finally, a common source amplifier is added as the first stage. With proper bias, the linear operation region is then effectively extended by 7.3 dB. This two stage power amplifier achieves large output power, high linearity and high PAE simultaneously. It delivers a gain of 20dB, a Psat of 16.3dBm, a P1dB of 15.41dBm, and a PAE of 30%.Since the invention of radio-frequency (RF) wireless communication more than 100 years ago, mobile phones and other wireless communications products for civilian consumption have developed rapidly. Nowadays, the demand for larger high data rate and capacities is rising sharply. The traditional wireless bandwidth is no longer able to meet some high-rate applications requirement. However, 60GHz wireless communication system is our solution, and up to 7 GHz unlicensed wide band around 60GHz is open to use across much of the world. Furthermore, the power amplifier (PA) is a critical part of any transmitter to convert the signal to higher power and drive the antenna. For power amplifiers, efficiency and linearity are most important. Power amplifiers with low efficiency will result in high level of heat dissipation. Linearity is a measure of the signal distortion, which consists of gain compression (AM-AM distortion) and phase distortion (AM-PM distortion). In this thesis work, an injection locked power amplifier is used to reduce the input driving requirements and improve the efficiency. Simulations have been performed for implementation in 65nm standard CMOS, which is a low-cost technology for fabrication of integrated circuits (chips). The injection locked technique means that a self-oscillating circuit is forced to run at the same frequency as the input signal. Furthermore, an integrated balun is added to transfer between single-ended and differential signals. The results show that this PA can achieve high efficiency but with poor linearity performance. In order to improve the linearity, different linearization techniques are investigated, including adaptive biasing and predistortion. Adaptive biasing is a feedback technique. At high output levels, the power amplifier has less gain, which leads to signal distortion. The adaptive biasing unit can sense the output power in real time and adjust the bias. The bias is then increased at increased output power in order to restore the power gain at high output levels. Predistortion is another linearization technique. A predistorter, which has a gain expansion characteristic, is then introduced before the PA to compensate for its gain reduction. Then, considering the advantages of these two linearization techniques, we combine them together to achieve even better results. Finally, a two-stage power amplifier is proposed by adding a common source amplifier as the first stage. The first stage can also produce a gain boost at the high output levels, and this expansion gain can be made to match the second-stage gain reduction very well. The simulation results show that the amplifier can achieve high linearity and efficiency at the same time

Analysis, simulation and design of nonlinear RF circuits

The PhD project consists of two parts. The first part concerns the development of Computer Aided Design (CAD) algorithms for high-frequency circuits. Novel Padébased algorithms for numerical integration of ODEs as arise in high-frequency circuits are proposed. Both single- and multi-step methods are introduced. A large part of this section of the research is concerned with the application of Filon-type integration techniques to circuits subject to modulated signals. Such methods are tested with analog and digital modulated signals and are seen to be very effective. The results confirm that these methods are more accurate than the traditional trapezoidal rule and Runge-Kutta methods. The second part of the research is concerned with the analysis, simulation and design of RF circuits with emphasis on injection-locked frequency dividers (ILFD) and digital delta-sigma modulators (DDSM). Both of these circuits are employed in fractional-N frequency synthesizers. Several simulation methods are proposed to capture the locking range of an ILFD, such as the Warped Multi-time Partial Differential Equation (WaMPDE) and the Multiple-Phase-Condition Envelope Following (MPCENV) methods. The MPCENV method is the more efficient and accurate simulation technique and it is recommended to obviate the need for expensive experiments. The Multi-stAge noise Shaping (MASH) digital delta-sigma modulator (DDSM) is simulated in MATLAB and analysed mathematically. A novel structure employing multimoduli, termed the MM-MASH, is proposed. The goal in this design work is to reduce the noise level in the useful frequency band of the modulator. The success of the novel structure in achieving this aim is confirmed with simulations

18th IEEE Workshop on Nonlinear Dynamics of Electronic Systems: Proceedings

Proceedings of the 18th IEEE Workshop on Nonlinear Dynamics of Electronic Systems, which took place in Dresden, Germany, 26 – 28 May 2010.:Welcome Address ........................ Page I Table of Contents ........................ Page III Symposium Committees .............. Page IV Special Thanks ............................. Page V Conference program (incl. page numbers of papers) ................... Page VI Conference papers Invited talks ................................ Page 1 Regular Papers ........................... Page 14 Wednesday, May 26th, 2010 ......... Page 15 Thursday, May 27th, 2010 .......... Page 110 Friday, May 28th, 2010 ............... Page 210 Author index ............................... Page XII

Modelling and analysis of differential VCOs

We present a systematic non-linear analysis of differential voltage controlled oscillators (VCOs), both bipolar and MOS. Using the standard device models, we derive the second-order non-linear equation describing the behaviour of these oscillators, which is formulated in a perturbation form. The solution of this equation is obtained as a particular case of the solution of the most general equation of second-order oscillators, which is solved through a suitable perturbation method. Unlike a pure numerical analysis, simple analytical relationships are derived for predicting the steady-state oscillation, its transient behaviour and for ascertaining the existence of a stable oscillation in differential VCOs. These relationships, leading to results which well agree with the SPICE simulations, are useful in both analysis and design