582 research outputs found

    Abstractions and Static Analysis for Verifying Reactive Systems

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    Fokkink, W.J. [Promotor]Sidorova, N. [Copromotor

    Automatic Translation of MSC Diagrams into Petri Nets

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    Development-engineers use in their work languages intended for software or hardware systems design, and test engineers utilize languages effective in verification, analysis of the systems properties and testing. Automatic interfaces between languages of these kinds are necessary in order to avoid ambiguous understanding of specification of models of the systems and inconsistencies in the initial requirements for the systems development. Algorithm of automatic translation of MSC (Message Sequence Chart) diagrams compliant with MSC’2000 standard into Petri Nets is suggested in this paper. Each input MSC diagram is translated into Petri Net (PN), obtained PNs are sequentially composed in order to synthesize a whole system in one final combined PN. The principle of such composition is defined through the basic element of MSC language — conditions. While translating reference table is developed for maintenance of consistent coordination between the input system’s descriptions in MSC language and in PN format. This table is necessary to present the results of analysis and verification on PN in suitable for the development-engineer format of MSC diagrams. The proof of algorithm correctness is based on the use of process algebra ACP. The most significant feature of the given algorithm is the way of handling of conditions. The direction for future work is the development of integral, partially or completely automated technological process, which will allow designing system, testing and verifying its various properties in the one frame

    Timing Analysis using the MARTE Profile in the Design of Rail Automation Systems

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    International audienceFor dependable systems as in the railway domain the timing behaviour is considered part of the functional correctness. Thus timing requirements have to be traced and refined through the system and software development phases and validation and verification efforts have to address the timing as well as the pure input/output behaviour. We show how timing can be handled in a UML or SysML based approach to the development of software-intensive railway systems by using the new MARTE profile. Thereby timing becomes fully integrated in the chain of system and software models and may benefit from tool support. Moreover, automated timing analysis may be employed via model transformations which enables the exploration of timing-related issues in various design phases

    Revision of Security Risk-oriented Patterns for Distributed Systems

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    Turvariskide haldamine on oluline osa tarkvara arendusest. Arvestades, et enamik tĂ€napĂ€eva ettevĂ”tetest sĂ”ltuvad suuresti infosĂŒsteemidest, on turvalisusel oluline roll sujuvalt toimivate Ă€riprotsesside tagamisel. Paljud inimesed kasutavad e-teenuseid, mida pakuvad nĂ€iteks pangad ja haigekassa. Ebapiisavatel turvameetmetel infosĂŒsteemides vĂ”ivad olla soovimatud tagajĂ€rjed nii ettevĂ”tte mainele kui ka inimeste eludele.\n\rTarkvara turvalisusega tuleb tavaliselt tegeleda kogu tarkvara arendusperioodi ja tarkvara eluea jooksul. Uuringute andmetel tegeletakse tarkvara turvakĂŒsimustega alles tarkvara arenduse ja hooldus etappidel. Kuna turvariskide vĂ€hendamine kaasneb tavaliselt muudatustena informatsioonisĂŒsteemi spetsifikatsioonis, on turvaanalĂŒĂŒsi mĂ”istlikum teha tarkvara vĂ€ljatöötamise algusjĂ€rgus. See vĂ”imaldab varakult vĂ€listada ebasobivad lahendused. Lisaks aitab see vĂ€ltida hilisemaid kulukaid muudatusi tarkvara arhitektuuris.\n\rKĂ€esolevas töös kĂ€sitleme turvalise tarkvara arendamise probleemi, pakkudes lahendusena vĂ€lja turvariskidele orienteeritud mustreid. Need mustrid aitavad leida turvariske Ă€riprotsessides ja pakuvad vĂ€lja turvariske vĂ€hendavaid lahendusi. Turvamustrid pakuvad analĂŒĂŒtikutele vahendit turvanĂ”uete koostamiseks Ă€riprotsessidele. Samuti vĂ€hendavad nad riskianalĂŒĂŒsiks vajalikku töömahtu. Oma töös joondame me turvariskidele orienteeritud mustrid vastu hajussĂŒsteemide turvaohtude mustreid. See vĂ”imaldab meil tĂ€iustada olemasolevaid turvariski mustreid ja vĂ”tta kasutusele tĂ€iendavaid mustreid turvariskide vĂ€hendamiseks hajussĂŒsteemides.\n\rTurvariskidele orienteeritud mustrite kasutatavust on kontrollitud lennunduse Ă€riprotsessides. Tulemused nĂ€itavad, et turvariskidele orienteeritud mustreid saab kasutada turvariskide vĂ€hendamiseks hajussĂŒsteemides.Security risk management is an important part of software development. Given that majority of modern organizations rely heavily on information systems, security plays a big part in ensuring smooth operation of business processes. Many people rely on e-services offered by banks and medical establishments. Inadequate security measures in information systems could have unwanted effects on an organization’s reputation and on people’s lives. Security concerns usually need to be addressed throughout the development and lifetime of a software system. Literature reports however, that security is often considered during implementation and maintenance stages of software development. Since security risk mitigation usually results with changes to an IS’s specification, security analysis is best done at an early phase of the development process. This allows an early exclusion of inadequate system designs. Additionally, it helps prevent the need for fundamental and expensive design changes later in the development process. In this thesis, we target the secure system development problem by suggesting application of security risk-oriented patterns. These patterns help find security risk occurrences in business processes and present mitigations for these risks. They provide business analysts with means to elicit and introduce security requirements to business processes. At the same time, they reduce the efforts needed for risk analysis. We confront the security risk-oriented patterns against threat patterns for distributed systems. This allows us to refine the collection of existing patterns and introduce additional patterns to mitigate security risks in processes of distributed systems. The applicability of these security risk-oriented patterns is validated on business processes from aviation turnaround system. The validation results show that the security risk-oriented patterns can be used to mitigate security risks in distributed systems

    Developing a distributed electronic health-record store for India

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    The DIGHT project is addressing the problem of building a scalable and highly available information store for the Electronic Health Records (EHRs) of the over one billion citizens of India

    Component-based control system development for agile manufacturing machine systems

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    It is now a common sense that manufactures including machine suppliers and system integrators of the 21 st century will need to compete on global marketplaces, which are frequently shifting and fragmenting, with new technologies continuously emerging. Future production machines and manufacturing systems need to offer the "agility" required in providing responsiveness to product changes and the ability to reconfigure. The primary aim for this research is to advance studies in machine control system design, in the context of the European project VIR-ENG - "Integrated Design, Simulation and Distributed Control of Agile Modular Machinery"

    Model Driven Communication Protocol Engineering and Simulation based Performance Analysis using UML 2.0

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    The automated functional and performance analysis of communication systems specified with some Formal Description Technique has long been the goal of telecommunication engineers. In the past SDL and Petri nets have been the most popular FDTs for the purpose. With the growth in popularity of UML the most obvious question to ask is whether one can translate one or more UML diagrams describing a system to a performance model. Until the advent of UML 2.0, that has been an impossible task since the semantics were not clear. Even though the UML semantics are still not clear for the purpose, with UML 2.0 now released and using ITU recommendation Z.109, we describe in this dissertation a methodology and tool called proSPEX (protocol Software Performance Engineering using XMI), for the design and performance analysis of communication protocols specified with UML. Our first consideration in the development of our methodology was to identify the roles of UML 2.0 diagrams in the performance modelling process. In addition, questions regarding the specification of non-functional duration contraints, or temporal aspects, were considered. We developed a semantic time model with which a lack of means of specifying communication delay and processing times in the language are addressed. Environmental characteristics such as channel bandwidth and buffer space can be specified and realistic assumptions are made regarding time and signal transfer. With proSPEX we aimed to integrate a commercial UML 2.0 model editing tool and a discrete-event simulation library. Such an approach has been advocated as being necessary in order to develop a closer integration of performance engineering with formal design and implementation methodologies. In order to realize the integration we firstly identified a suitable simulation library and then extended the library with features required to represent high-level SDL abstractions, such as extended finite state machines (EFSM) and signal addressing. In implementing proSPEX we filtered the XML output of our editor and used text templates for code generation. The filtering of the XML output and the need to extend our simulation library with EFSM abstractions was found to be significant implementation challenges. Lastly, in order to to illustrate the utility of proSPEX we conducted a performance analysis case-study in which the efficient short remote operations (ESRO) protocol is used in a wireless e-commerce scenario
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