19 research outputs found

    Formally-Based Design Evaluation (extended version)

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    This paper investigates specification, verification and test generation for synchronous and asynchronous circuits. The approach is called DILL (Digital Logic in LOTOS). DILL models are discussed for synchronous and asynchronous circuits. Relations for (strong) conformance are defined for verifying a design specification against a high-level specification. An algorithm is also outlined for generating and applying implementation tests based on a specification. Tools have been developed for automated test generation and verification of conformance between an implementation and its specification. The approach is illustrated with various benchmark circuits as case studies

    Verifying and Testing Asynchronous Circuits using LOTOS (extended version)

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    It is shown howDILL (Digital Logic in LOTOS) can be used to specify,verify and test asynchronous hardware designs. Asynchronous (unclocked) circuits are a topic of active research in the hardware community. It is illustrated how DILL can address some of the key challenges. New relations for (strong) conformance are defined for assessing a circuit implementation against its specification. An algorithm is also presented for generating and applying implementation tests based on a specification. Tools have been developed for automated verification of conformance and generation of tests. The approach is illustrated with three case studies that explore speed independence, delay sensitivity and testing of sample asynchronous circuit designs

    Petri net modelling of a communications protocol

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    The Petri net is a formal modelling tool applicable to distributed systems and communication protocols. Two methods of analysis are applied to formal models of the "Alternating Bit Protocol". (i) A timed Petri net model is simulated to measure protocol performance. (ii) A modular numeric Petri net model is validated by reachability analysis. The simulation and validation tools are programmed in (i) "C" language and (ii) Prolog. A specification language "Needle" is developed. It describes the model system as a hierarchy of modular state transition networks. The model is searched for all possible event sequences, and the result displayed as a reachability tree. The specification language is capable of describing models which execute backwards in simulation time. The modular numeric Petri net is the basis of a powerful computer architecture, capable of parsing its own specification language to build complex models. Attention is drawn to the similarities between Petri net theory and quantum mechanics

    Behavioural aspects of term-rewriting systems

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    Context-dependent bisimulation between processes

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    Developing a design framework for communication systems

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    Automated synthesis of delay-insensitive circuits

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