Insulators for 2D nanoelectronics: the gap to bridge

Nanoelectronic devices based on 2D materials are far from delivering their full theoretical performance potential due to the lack of scalable insulators. Amorphous oxides that work well in silicon technology have ill-defined interfaces with 2D materials and numerous defects, while 2D hexagonal boron nitride does not meet required dielectric specifications. The list of suitable alternative insulators is currently very limited. Thus, a radically different mindset with respect to suitable insulators for 2D technologies may be required. We review possible solution scenarios like the creation of clean interfaces, production of native oxides from 2D semiconductors and more intensive studies on crystalline insulators

Insulators for 2D nanoelectronics: the gap to bridge

Nanoelectronic devices based on 2D materials are far from delivering their full theoretical performance potential due to the lack of scalable insulators. Amorphous oxides that work well in silicon technology have ill-defined interfaces with 2D materials and numerous defects, while 2D hexagonal boron nitride does not meet required dielectric specifications. The list of suitable alternative insulators is currently very limited. Thus, a radically different mindset with respect to suitable insulators for 2D technologies may be required. We review possible solution scenarios like the creation of clean interfaces, production of native oxides from 2D semiconductors and more intensive studies on crystalline insulators

Miniaturized Transistors, Volume II

In this book, we aim to address the ever-advancing progress in microelectronic device scaling. Complementary Metal-Oxide-Semiconductor (CMOS) devices continue to endure miniaturization, irrespective of the seeming physical limitations, helped by advancing fabrication techniques. We observe that miniaturization does not always refer to the latest technology node for digital transistors. Rather, by applying novel materials and device geometries, a significant reduction in the size of microelectronic devices for a broad set of applications can be achieved. The achievements made in the scaling of devices for applications beyond digital logic (e.g., high power, optoelectronics, and sensors) are taking the forefront in microelectronic miniaturization. Furthermore, all these achievements are assisted by improvements in the simulation and modeling of the involved materials and device structures. In particular, process and device technology computer-aided design (TCAD) has become indispensable in the design cycle of novel devices and technologies. It is our sincere hope that the results provided in this Special Issue prove useful to scientists and engineers who find themselves at the forefront of this rapidly evolving and broadening field. Now, more than ever, it is essential to look for solutions to find the next disrupting technologies which will allow for transistor miniaturization well beyond silicon’s physical limits and the current state-of-the-art. This requires a broad attack, including studies of novel and innovative designs as well as emerging materials which are becoming more application-specific than ever before

Strain-Engineered MOSFETs

This book brings together new developments in the area of strain-engineered MOSFETs using high-mibility substrates such as SIGe, strained-Si, germanium-on-insulator and III-V semiconductors into a single text which will cover the materials aspects, principles, and design of advanced devices, their fabrication and applications. The book presents a full TCAD methodology for strain-engineering in Si CMOS technology involving data flow from process simulation to systematic process variability simulation and generation of SPICE process compact models for manufacturing for yield optimization

Advances in quantum tunneling models for semiconductor optoelectronic device simulation

The undiscussed role of solid-state optoelectronics covers nowadays a wide range of applications. Within this scenario, infrared (IR) detection is becoming crucial by the technological point of view, as well as for scientific purposes, from biology to aerospace. Its commercial and strategic role, however, is confirmed by its spreading use for surveillance, clinical diagnostics, environmental analysis, national/private security, military purposes or quality control as in food industry. At the same time solid-state lighting is emerging among the most efficient electronic applications of the modern era, with a billion-dollar business which is just destined to increase in the next decades. The ongoing development of such technologies must be accompanied by a sufficiently fast scientific progress, which is able to meet the growing demand of high-quality production standards and, as immediate but not obvious consequence, the need of performances which would be the highest possible. One issue affecting both kinds of applications we mentioned is the quantum efficiency, no matter the signal they produce is coming from absorbed or emitted photons. At any rate, the balance between the stimulus coming from the surrounding environment is and the generated electrical current is absolutely crucial in each modern optoelectronic device. More in depth, since IR detectors are asked to convert photons into electrons, device designers must ensure that mechanisms concurring to this conversion should be dominant with respect to any opponent phenomenon. Symmetrically, light-emitting diodes should realize the inverse process, where electrons are converted into photons. In real life this mechanism never take place in a one-to-one electron-photon correspondence. Indeed tunneling, a quantum effect related to the probabilistic nature of particles and, thus, also of charges, contributes to unbalance this correspondence by degrading the signal produced within the device active region. In IR photodetectors this translates into of a current even in absence of light (and, by virtue of this fact, this current is known as "dark current") while in light-emitters tunneling is responsible for leakages that may undermine the quantum efficiency and the power consumption also below the optical turn-on. The present dissertation is part of such framework being the result of studying and modeling different tunneling mechanisms occurring in narrow-gap infrared photodetectors (IRPDs) for mid-wavelength IR (MWIR) applications (3 to 5 um) and in wide-gap blue LEDs (around 450 nm) based on nitride material system. This study has been possible thanks to the collaboration with several academic institutions (Boston University, Padua and Modena e Reggio Emilia Universities) and two important German industries, AIM Infrarot Module and OSRAM Opto Semiconductors, which provided the case-study devices here analyzed. After reviewing basic concepts of solid-state physics, the first part of this work deals with the description of the above cited optoelectronic devices, along with their constituent materials: the HgCdTe alloy, in the case of photodetectors, and GaN and its ternary alloys with In and Al, for what concerns blue LEDs. Since the literature focusing on this research area is still not mature enough, in the second part different tunneling mechanisms and models are proposed, described in detail and then tested for the first time, as in the case of a novel formulation intended for direct tunneling in IRPDs or the description of defect-assisted tunneling in LEDs which also includes elements coming from the microscopic theory of multiphonon emission (MPE) in solids. Simulations are carried out by means of several numerical simulation approaches, using either commercial TCAD (Technology Computer Aided Design) tools and codes developed ad hoc for this purpose. The encouraging and fully satisfying results of numerical modeling here proposed confirm, on the one hand, the widely accepted relevance of tunneling in modern electronics and, on the other hand, also propose a new perspective about possible tunneling mechanism in optoelectronic devices and their appropriate physical, mathematical and numerical investigation tools. Furthermore, the role of device modeling does not end here because many physical details and technological information can be inferred from simulations, with enormous beneficial effects for the electronic industry and the quality improvement of its fabrication processes such those invoked above

Electrical Characterisation of III-V Nanowire MOSFETs

The ever increasing demand for faster and more energy-efficient electricalcomputation and communication presents severe challenges for the semiconductor industry and particularly for the metal-oxidesemiconductorfield-effect transistor (MOSFET), which is the workhorse of modern electronics. III-V materials exhibit higher carrier mobilities than the most commonly used MOSFET material Si so that the realisation of III-V MOSFETs can enable higher operation speeds and lower drive voltages than that which is possible in Si electronics. A lowering of the transistor drive voltage can be further facilitated by employing gate-all-around nanowire geometries or novel operation principles. However, III-V materials bring about their own challenges related to material quality and to the quality of the gate oxide on top of a III-V MOSFET channel.This thesis presents detailed electrical characterisations of two types of (vertical) III-V nanowire transistors: MOSFETs based on conventional thermionic emission; and Tunnel FETs, which utilise quantum-mechanical tunnelling instead to control the device current and reach inverse subthreshold slopes below the thermal limit of 60 mV/decade. Transistor characterisations span over fourteen orders of magnitude in frequency/time constants and temperatures from 11 K to 370 K.The first part of the thesis focusses on the characterisation of electrically active material defects (‘traps’) related to the gate stack. Low-frequency noise measurements yielded border trap densities of 10^18 to 10^20 cm^-3 eV^-1 and hysteresis measurements yielded effective trap densities – projected to theoxide/semiconductor interface – of 2x10^12 to 3x10^13 cm^-2 eV^-1. Random telegraph noise measurements revealed that individual oxide traps can locally shift the channel energy bands by a few millielectronvolts and that such defects can be located at energies from inside the semiconductor band gap all the way into the conduction band.Small-signal radio frequency (RF) measurements revealed that parts of the wide oxide trap distribution can still interact with carriers in the MOSFET channel at gigahertz frequencies. This causes frequency hystereses in the small-signal transconductance and capacitances and can decrease the RF gains by a few decibels. A comprehensive small-signal model was developed, which takes into account these dispersions, and the model was applied to guide improvements of the physical structure of vertical RF MOSFETs. This resulted in values for the cutoff frequency fT and the maximum oscillation frequency fmax of about 150 GHz in vertical III-V nanowire MOSFETs.Bias temperature instability measurements and the integration of (lateral) III-V nanowire MOSFETs in a back end of line process were carried out as complements to the main focus of this thesis. The results of this thesis provide a broad perspective of the properties of gate oxide traps and of the RF performance of III-V nanowire transistors and can act as guidelines for further improvement and finally the integration of III-V nanowire MOSFETs in circuits

Cutting Edge Nanotechnology

The main purpose of this book is to describe important issues in various types of devices ranging from conventional transistors (opening chapters of the book) to molecular electronic devices whose fabrication and operation is discussed in the last few chapters of the book. As such, this book can serve as a guide for identifications of important areas of research in micro, nano and molecular electronics. We deeply acknowledge valuable contributions that each of the authors made in writing these excellent chapters

Characterization of Charge Trapping Phenomena in GaN-based HEMTs

This dissertation reports on charge-trapping phenomena and related parasitic effects in AlGaN/GaN high electron mobility transistors. By means of static and pulsed I-V measurements and deep-level transient spectroscopy, the main charge-trapping mechanisms affecting the dynamic performance of GaN-based HEMTs devoted to microwave and power switching applications have been comprehensively characterized, identifying the nature and the localization of the deep-levels responsible for the electrically active trap-states. A high-voltage measurement system capable for double-pulsed ID-VD, ID-VG and drain-current transient spectroscopy has been successfully designed and implemented. A characterization methodology, including the analysis of static I-V measurements, pulsed I-V measurements, and deep-level transient spectroscopy, has been developed to investigate the impact of voltage, current, and temperature on the parasitic effects of charge-trapping (threshold voltage instabilities, dynamic on-resistance increase, and transconductance reduction), and on trapping/detrapping kinetics. Experimental results gathered on transistor structures are supported by complementary capacitance deep-level transient spectroscopy (C-DLTS) performed on 2-terminal diode (FATFET) structures. Two main case-studies have been investigated. Schottky-gated AlGaN/GaN HEMTs grown on silicon carbide substrate employing iron and/or carbon doped buffers devoted to microwave applications, and MIS-gated double-heterostructure AlGaN/GaN/AlGaN HEMTs grown on silicon substrate devoted to power switching applications. The devices under test have been exposed to the complete set of current-voltage regimes experienced during the real life operations, including off-state, semi-on-state, and on-state. The main novel results are reported in the following: • Identification of a charge-trapping mechanism promoted by hot-electrons. This mechanism is critical in semi-on-state, with the combination of relatively high electric-field and relatively high drain-source current. • Identification of a positive temperature-dependent charge-trapping mechanism localized in the buffer-layer, potentially promoted by the vertical drain to substrate potential. This mechanism is critical in high drain-voltage off-state bias in high temperature operations. • Identification of deep-levels and charge-trapping related to the presence of doping compensation agents (iron and carbon) within the GaN buffer layer. • Identification of charge-trapping mechanism ascribed to the SiNX and/or Al2O3 insulating layers of MIS-gated HEMTs. This mechanism is promoted in the on-state with positive gate-voltage and positive gate leakage current. • Identification of a potential charge-trapping mechanism ascribed to reverse gate leakage current in Schottky-gate HEMTs exposed to high-voltage off-state. • The characterization of surface-traps in ungated and unpassivated devices by means of drain-current transient spectroscopy reveals a non-exponential and weakly thermally-activated detrapping behaviour. • Preliminary synthesis of a degradation mechanism characterized by the generation of defect-states, the worsening of parasitic charge-trapping effects, and the degradation of rf performance of AlGaN/GaN HEMTs devoted to microwave operations. The evidence of this degradation mechanism is appreciable only by means of rf or pulsed I-V measurements: no apparent degradation is found by means of DC analysis