11,495 research outputs found

    Dynamic modeling of pwm and single-switch single-stage power factor correction converters

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    The concept of averaging has been used extensively in the modeling of power electronic circuits to overcome their inherent time-variant nature. Among various methods, the PWM switch modeling approach is most widely accepted in the study of closed-loop stability and transient response because of its accuracy and simplicity. However, a non-ideal PWM switch model considering conduction losses is not available except for converters operating in continuous conduction mode (CCM) and under small ripple conditions. Modeling of conductor losses under large ripple conditions has not been reported in the open literature, especially when the converter operates in discontinuous conduction mode (DCM). In this dissertation, new models are developed to include conduction losses in the non-ideal PWM switch model under CCM and DCM conditions. The developed model is verified through two converter examples and the effect of conduction losses on the steady state and dynamic responses of the converter is also studied. Another major constraint of the PWM switch modeling approach is that it heavily relies on finding the three-terminal PWM switch. This requirement severely limits its application in modeling single-switch single-stage power factor correction (PFC) converters, where more complex topological structures and switching actions are often encountered. In this work, we developed a new modeling approach which extends the PWM switch concept by identifying the charging and discharging voltages applied to the inductors. The new method can be easily applied to derive large-signal models for a large group of PFC converters and the procedure is elaborated through a specific example. Finally, analytical results regarding harmonic contents and power factors of various PWM converters in PFC applications are also presented here

    A Control Scheme for an AC-DC Single-Stage Buck-Boost PFC Converter with Improved Output Ripple Reduction

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    AC-DC power factor correction (PFC) single-stage converters are attractive because of their cost and their simplicity. In these converters, both PFC and power conversion are done at the same time using a single converter that regulates the output. Since they have only a single controller, these converters operate with an intermediate transformer primary-side DC bus voltage that is unregulated and is dependent on the converters’ operating conditions and component values. This means that the DC bus voltage can vary significantly as line and load conditions are changed. Such a variable DC bus voltage makes it difficult to optimally design the converter transformer as well as the DC bus capacitor. One previously proposed single-stage AC-DC converter, the Single-Stage Buck-Boost Direct Energy Transfer (SSBBDET) converter has a clamping mechanism that can clamp the DC bus voltage to a pre-set limit. The clamping mechanism, however, superimposes a low frequency 120 Hz AC component on the output DC voltage so that some means must be taken to reduce this component. These means, however, make the converter transient slow and sluggish. The main objective of this thesis is to minimize the 120 Hz output ripple component and to improve the dynamic response of the SSBBDET converter by using a new control scheme. In the thesis, the operation of the SSBBDET converter is reviewed and the proposed control method is introduced and explained in detail. Key design considerations for the design of the converter controller are discussed and the converter’s ability to operate with fixed DC bus voltage, low output ripple and fast dynamic response is confirmed with experimental results obtained from a prototype converter

    Hardware implementation of boost power factor correction converter.

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    Nowadays, there has been an increasing demand of unity power factor in electrical power sector. Due to the nonlinear nature of load equipment, switching devices, source voltage and current are out of phase with each other. Many power converters topologies are used for the power factor correction. The boost converter with controller is most common for power factor correction circuits. The controller objective is to maintain the output voltage regulation and input current tracking with source voltage. The voltage ripple present due to the ac component of the current tracking objective, hence instead of ignoring that ripple, it is used in controller designing. The mathematical modeling of system depends on ac and dc dynamics of the circuit. The Lypunov stability analysis used for designing the controller of boost converter. In this work, experimental set-up for boost power factor correction converter was made with power pole board and NI compact RIO. The controller algorithm executed in LabVIEW FPGA module and results were verified. This novel controller ensures the convergence of the error signal by stability analysis

    Modelamiento y desarrollo de un rectificador Boost PFC sin puente

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    RESUMEN: Este artículo propone un modelo para rectificadores elevadores PFC (Power Factor Correction por sus siglas en inglés) sin puente para propósitos de control y basado en el análisis del promedio de pequeña señal. A partir de las leyes circuitales, cuatro modos de operación son definidos y explicados, asegurando una relación entre las variables físicas del convertidor. Basados en el modelo propuesto, dos lazos cerrados de control compuestos por controladores lineales Proporcionales e Integrales (PI) son propuestos. Algunas consideraciones de diseño para dimensionar los elementos reactivos son incluidas, de tal forma que se obtienen valores mínimos para su inductancia y capacitancia. Se presenta la implementación de un prototipo de 900 W con resultados experimentales que permite validar y reafirmar el modelo propuesto. Los resultados experimentales demuestran que el uso del convertidor PFC permite elevar el factor de potencia FP a 0,99 o más y reducir el THDi (Total Harmonic Distortion of the Current por sus siglas en Inglés) a 3,9 %, además de controlar el bus DC en la salida. Se verifica experimentalmente que el convertidor PFC desarrollado está de acuerdo con los estándares de calidad de la potencia EN 61000-3-2 (IEC 1000-3-2).ABSTRACT: This paper proposes a model of the bridgeless PFC (Power Factor Correction) boost rectifier for control purposes based on an averaged small-signal analysis. From circuital laws, four operation modes are defined and explained, ensuring a relationship of physical variables in the converter. Based on the proposed model, two-loop cascade control structures composed of Proportional-Integral (PI) lineal controllers are proposed. Design consideration for dimensioning reactive elements is included, providing minimum values for their inductance and capacitance. Implementation of a laboratory prototype of 900 W and experimental results are presented to validate and reaffirm the proposed model. Experimental results demonstrate that the use of the bridgeless PFC boost converter model allows the Power Factor (PF) to be elevated up to 0.99, to reduce the THDi (Total Harmonic Distortion of the Current) to 3.9% and to control the DC voltage level on output. Compliance of standards of power quality EN 61000-3-2 (IEC 1000-3-2) are experimentally verified

    Low Voltage Regulator Modules and Single Stage Front-end Converters

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    Evolution in microprocessor technology poses new challenges for supplying power to these devices. To meet demands for faster and more efficient data processing, modem microprocessors are being designed with lower voltage implementations. More devices will be packed on a single processor chip and the processors will operate at higher frequencies, exceeding 1GHz. New high-performance microprocessors may require from 40 to 80 watts of power for the CPU alone. Load current must be supplied with up to 30A/µs slew rate while keeping the output voltage within tight regulation and response time tolerances. Therefore, special power supplies and Voltage Regulator Modules (VRMs) are needed to provide lower voltage with higher current and fast response. In the part one (chapter 2,3,4) of this dissertation, several low-voltage high-current VRM technologies are proposed for future generation microprocessors and ICs. The developed VRMs with these new technologies have advantages over conventional ones in terms of efficiency, transient response and cost. In most cases, the VRMs draw currents from DC bus for which front-end converters are used as a DC source. As the use of AC/DC frond-end converters continues to increase, more distorted mains current is drawn from the line, resulting in lower power factor and high total harmonic distortion. As a branch of active Power factor correction (PFC) techniques, the single-stage technique receives particular attention because of its low cost implementation. Moreover, with continuously demands for even higher power density, switching mode power supply operating at high-frequency is required because at high switching frequency, the size and weight of circuit components can be remarkably reduced. To boost the switching frequency, the soft-switching technique was introduced to alleviate the switching losses. The part two (chapter 5,6) of the dissertation presents several topologies for this front-end application. The design considerations, simulation results and experimental verification are discussed

    One-cycle control of switching converters

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    A new large-signal nonlinear control technique is proposed to control the duty-ratio d of a switch such that in each cycle the average value of a switched variable of the switching converter is exactly equal to or proportional to the control reference in the steady-state or in a transient. One-cycle control rejects power source perturbations in one switching cycle; the average value of the switched variable follows the dynamic reference in one switching cycle; and the controller corrects switching errors in one switching cycle. There is no steady-state error nor dynamic error between the control reference and the average value of the switched variable. Experiments with a constant frequency buck converter have demonstrated the robustness of the control method and verified the theoretical predictions. This new control method is very general and applicable to all types of pulse-width-modulated, resonant-based, or soft-switched switching converters for either voltage or current control in continuous or discontinuous conduction mode. Furthermore, it can be used to control any physical variable or abstract signal that is in the form of a switched variable or can be converted to the form of a switched variable

    Analysis and Implementation of Ripple Current Cancellation Technique for Electronic Ballasts

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