AO-OpenCom: an AO-Middleware architecture supporting flexible dynamic reconfiguration

Middleware has emerged as a key technology in the construction of distributed systems. As a consequence, middleware is increasingly required to be highly modular and configurable, to support separation of concerns between services, and, crucially, to support dynamic reconfiguration: i.e. to be capable of being changed while running. Aspect-oriented middleware is a promising technology for the realisation of distributed reconfiguration in distributed systems. In this paper we propose an aspect-oriented middleware platform called AO-OpenCom that builds AO-based reconfiguration on top of a dynamic component approach to middleware system composition. The goal is to support extremely flexible dynamic reconfiguration that can be applied at all levels of the system and uniformly across the distributed environment. We evaluate our platform by the capability in meeting flexible reconfiguration and the impact of these overheads

Preliminary multicore architecture for Introspective Computing

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.Includes bibliographical references (p. 243-245).This thesis creates a framework for Introspective Computing. Introspective Computing is a computing paradigm characterized by self-aware software. Self-aware software systems use hardware mechanisms to observe an application's execution so that they may adapt execution to improve performance, reduce power consumption, or balance user-defined fitness criteria over time-varying conditions in a system environment. We dub our framework Partner Cores. The Partner Cores framework builds upon tiled multicore architectures [11, 10, 25, 9], closely coupling cores such that one may be used to observe and optimize execution in another. Partner cores incrementally collect and analyze execution traces from code cores then exploit knowledge of the hardware to optimize execution. This thesis develops a tiled architecture for the Partner Cores framework that we dub Evolve. Evolve provides a versatile substrate upon which software may coordinate core partnerships and various forms of parallelism. To do so, Evolve augments a basic tiled architecture with introspection hardware and programmable functional units. Partner Cores software systems on the Evolve hardware may follow the style of helper threading [13, 12, 6] or utilize the programmable functional units in each core to evolve application-specific coprocessor engines. This thesis work develops two Partner Cores software systems: the Dynamic Partner-Assisted Branch Predictor and the Introspective L2 Memory System (IL2). The branch predictor employs a partner core as a coprocessor engine for general dynamic branch prediction in a corresponding code core. The IL2 retasks the silicon resources of partner cores as banks of an on-chip, distributed, software L2 cache for code cores.(cont.) The IL2 employs aggressive, application-specific prefetchers for minimizing cache miss penalties and DRAM power consumption. Our results and future work show that the branch predictor is able to sustain prediction for code core branch frequencies as high as one every 7 instructions with no degradation in accuracy; updated prediction directions are available in a low minimum of 20-21 instructions. For the IL2, we develop a pixel block prefetcher for the image data structure used in a JPEG encoder benchmark and show that a 50% improvement in absolute performance is attainable.by Jonathan M. Eastep.S.M

Dpws middleware to support agent-based manufacturing control and simulation

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Electrotécnica e de ComputadoresIn present manufacturing systems, the current challenge is the development of highly reconfigurable, truly distributed solutions. The tendency is to build manufacturing systems with autonomous, intelligent and distributed components that will support reconfiguration and adaptability. The most promising paradigms for the implementation of such systems are multi-agents and service oriented architectures (SOA), mainly over the DPWS (Device Profile for Web Services) implementation which was aimed at devices. An important limitation of most current multi-agent systems is that the management system is not totally distributed. Failure in the agent responsible for the registry can overthrow the entire system. DPWS does not have this limitation, since the management system is totally distributed. However, DPWS does not support agent autonomy notions as efficiently. The possibility of creating a truly distributed multi-agent system by linking both approaches led to this thesis. A Middleware layer was developed that enables agents to benefit from DPWS functionalities in order to reach the proposed goal. This middleware layer joins agents, databases, hardware, simulators, human interface applications such as production system management, error correction and maintenance, etc. To prove this concept a 3D model of an agent controlled manufacturing system with transporters augmented with DPWS communication interfaces was developed

Identifying post-silicon bugs and their root causes through a hardware introspection engine

The goal of this project is to design, build, and evaluate new hardware mechanisms to debug post-silicon bugs in Systems-on-Chip (SoCs). Specifically, we aim to accelerate the diagnosis of complex bugs such as deadlocks that are notoriously hard to identify using existing debugging mechanisms such as ARM CoreSight and hardware performance counters. We will design and evaluate programmable introspection mechanisms that will analyze streams of program and hardware-level trace data at test- and run-time, check correctness invariants, and generate event summaries that point to root causes of bugs. This thesis describes an on-chip hardware introspection engine (HIE) that detects anomalous transactions and alerts the user of potential bugs that could lead to deadlock. The HIE is a device that attaches to a bus and snoops on request and response transactions and collects response latency metadata for the transactions it receives. From this metadata, HIE is able to evaluate the normal behavior of transactions and alert engineers when anomalous behavior is detected at run-time. The HIE also separates the metadata it collects for different address ranges, creating a local version of the memory map that allows easy integration into existing systems. Synthesis on a FPGA and simulation of the HIE show that minimal area overhead is required for implementation and 100% detection accuracy is achievable for deadlock scenarios. The concept of learning address ranges and collecting and analyzing metadata for these ranges can have many applications in different fields that leverage anomaly detection, i.e. security, debug, etc.Electrical and Computer Engineerin

A Demo of Application Lifecycle Management for IoT Collaborative Neighborhood in the Fog

International audienceRegarding latency, privacy, resiliency and network scarcity management, only distributed approaches such as proposed by Fog Computing architecture can efficiently address the fantastic growth of the Internet of Things (IoT). IoT applications could be deployed and run hierarchically at different levels in an infrastructure ranging from centralized datacenters to the connected things themselves. Consequently, software entities composing IoT applications could be executed in many different configurations. The heterogeneity of the equipment and devices of the target infrastructure opens opportunities in the placement of the software entities, taking into account their requirements in terms of hardware, cyber-physical interactions and software dependencies. Once the most appropriate place has been found, software entities have to be deployed and run. Container-based virtualization has been considered to overpass the complexity of packaging, deploying and running software entities in a heterogeneous distributed infrastructure at the vicinity of the connected devices. This paper reports a practical experiment presented as a live demo that showcases a " Smart Bell in a Collaborative Neighborhood " IoT application in the Fog. Application Lifecycle Management (ALM) has been put in place based on Docker technologies to deploy and run micro-services in the context of Smart Homes operated by Orange

The Internet-of-Things : review and research directions

This paper presents a review of the Internet-of-Things (IoT) through four conceptualizations: IoT as liquification and density of information of resources; IoT as digital materiality; IoT as assemblage or service system; and IoT as modules, transactions, and service. From the conceptualizations, we provide a definition of IoT and present its implications and impact on future research in Marketing that interfaces with information systems, design and innovation, data science and cybersecurity, as well as organizational studies and economics. By integrating the implications of IoT with extant literature, we then propose a set of priorities for future research in this area. Highlights ● Consumer experiences with physical products will be highly visible in an era of IoT. ● Physical products are evolving into connected and dynamically reconfigurable service platforms that are socio-cyber-physical. ● Information is leaking out and liquifying everywhere and data is ubiquitous. ● Consumers personal data allow for personalization of the offering but could result in consumer vulnerabilities. ● Shifting boundaries due to information flows in an era of IoT will transform markets and exchanges

Choose-Your-Own Adventure: A Lightweight, High-Performance Approach To Defect And Variation Mitigation In Reconfigurable Logic

For field-programmable gate arrays (FPGAs), fine-grained pre-computed alternative configurations, combined with simple test-based selection, produce limited per-chip specialization to counter yield loss, increased delay, and increased energy costs that come from fabrication defects and variation. This lightweight approach achieves much of the benefit of knowledge-based full specialization while reducing to practical, palatable levels the computational, testing, and load-time costs that obstruct the application of the knowledge-based approach. In practice this may more than double the power-limited computational capabilities of dies fabricated with 22nm technologies. Contributions of this work: • Choose-Your-own-Adventure (CYA), a novel, lightweight, scalable methodology to achieve defect and variation mitigation • Implementation of CYA, including preparatory components (generation of diverse alternative paths) and FPGA load-time components • Detailed performance characterization of CYA – Comparison to conventional loading and dynamic frequency and voltage scaling (DFVS) – Limit studies to characterize the quality of the CYA implementation and identify potential areas for further optimizatio

TrustShadow: Secure Execution of Unmodified Applications with ARM TrustZone

The rapid evolution of Internet-of-Things (IoT) technologies has led to an emerging need to make it smarter. A variety of applications now run simultaneously on an ARM-based processor. For example, devices on the edge of the Internet are provided with higher horsepower to be entrusted with storing, processing and analyzing data collected from IoT devices. This significantly improves efficiency and reduces the amount of data that needs to be transported to the cloud for data processing, analysis and storage. However, commodity OSes are prone to compromise. Once they are exploited, attackers can access the data on these devices. Since the data stored and processed on the devices can be sensitive, left untackled, this is particularly disconcerting. In this paper, we propose a new system, TrustShadow that shields legacy applications from untrusted OSes. TrustShadow takes advantage of ARM TrustZone technology and partitions resources into the secure and normal worlds. In the secure world, TrustShadow constructs a trusted execution environment for security-critical applications. This trusted environment is maintained by a lightweight runtime system that coordinates the communication between applications and the ordinary OS running in the normal world. The runtime system does not provide system services itself. Rather, it forwards requests for system services to the ordinary OS, and verifies the correctness of the responses. To demonstrate the efficiency of this design, we prototyped TrustShadow on a real chip board with ARM TrustZone support, and evaluated its performance using both microbenchmarks and real-world applications. We showed TrustShadow introduces only negligible overhead to real-world applications.Comment: MobiSys 201

Late-bound code generation

Each time a function or method is invoked during the execution of a program, a stream of instructions is issued to some underlying hardware platform. But exactly what underlying hardware, and which instructions, is usually left implicit. However in certain situations it becomes important to control these decisions. For example, particular problems can only be solved in real-time when scheduled on specialised accelerators, such as graphics coprocessors or computing clusters. We introduce a novel operator for hygienically reifying the behaviour of a runtime function instance as a syntactic fragment, in a language which may in general differ from the source function definition. Translation and optimisation are performed by recursively invoked, dynamically dispatched code generators. Side-effecting operations are permitted, and their ordering is preserved. We compare our operator with other techniques for pragmatic control, observing that: the use of our operator supports lifting arbitrary mutable objects, and neither requires rewriting sections of the source program in a multi-level language, nor interferes with the interface to individual software components. Due to its lack of interference at the abstraction level at which software is composed, we believe that our approach poses a significantly lower barrier to practical adoption than current methods. The practical efficacy of our operator is demonstrated by using it to offload the user interface rendering of a smartphone application to an FPGA coprocessor, including both statically and procedurally defined user interface components. The generated pipeline is an application-specific, statically scheduled processor-per-primitive rendering pipeline, suitable for place-and-route style optimisation. To demonstrate the compatibility of our operator with existing languages, we show how it may be defined within the Python programming language. We introduce a transformation for weakening mutable to immutable named bindings, termed let-weakening, to solve the problem of propagating information pertaining to named variables between modular code generating units.Open Acces