Fourier Response of a Memristor: Generation of High Harmonics with Increasing Weights

We investigate the Fourier transform of the current through a memristor when the applied-voltage frequency is smaller than the characteristic memristor frequency, and the memristor shows hysteresis in the current-voltage plane. We find that when the hysteresis curve is "smooth", the current Fourier transform has weights at odd and even harmonics that decay rapidly and monotonically with the order of the harmonic; when the hysteresis curve is "sharp", the Fourier transform of the current is significantly broader, with non-monotonic weights at high harmonics. We present a simple model which shows that this qualitative change in the Fourier spectrum is solely driven by the saturation of memristance during a voltage cycle, and not independently by various system parameters such as applied or memristor frequencies, and the non-linear dopant drift.Comment: 5 pages, 3 figure

A Compact CMOS Memristor Emulator Circuit and its Applications

Conceptual memristors have recently gathered wider interest due to their diverse application in non-von Neumann computing, machine learning, neuromorphic computing, and chaotic circuits. We introduce a compact CMOS circuit that emulates idealized memristor characteristics and can bridge the gap between concepts to chip-scale realization by transcending device challenges. The CMOS memristor circuit embodies a two-terminal variable resistor whose resistance is controlled by the voltage applied across its terminals. The memristor 'state' is held in a capacitor that controls the resistor value. This work presents the design and simulation of the memristor emulation circuit, and applies it to a memcomputing application of maze solving using analog parallelism. Furthermore, the memristor emulator circuit can be designed and fabricated using standard commercial CMOS technologies and opens doors to interesting applications in neuromorphic and machine learning circuits.Comment: Submitted to International Symposium of Circuits and Systems (ISCAS) 201

Fully CMOS Memristor Based Chaotic Circuit

This paper demonstrates the design of a fully CMOS chaotic circuit consisting of only DDCC based memristor and inductance simulator. Our design is composed of these active blocks using CMOS 0.18 µm process technology with symmetric ±1.25 V supply voltages. A new single DDCC+ based topology is used as the inductance simulator. Simulation results verify that the design proposed satisfies both memristor properties and the chaotic behavior of the circuit. Simulations performed illustrate the success of the proposed design for the realization of CMOS based chaotic applications

On the application of a diffusive memristor compact model to neuromorphic circuits

Memristive devices have found application in both random access memory and neuromorphic circuits. In particular, it is known that their behavior resembles that of neuronal synapses. However, it is not simple to come by samples of memristors and adjusting their parameters to change their response requires a laborious fabrication process. Moreover, sample to sample variability makes experimentation with memristor-based synapses even harder. The usual alternatives are to either simulate or emulate the memristive systems under study. Both methodologies require the use of accurate modeling equations. In this paper, we present a diffusive compact model of memristive behavior that has already been experimentally validated. Furthermore, we implement an emulation architecture that enables us to freely explore the synapse-like characteristics of memristors. The main advantage of emulation over simulation is that the former allows us to work with real-world circuits. Our results can give some insight into the desirable characteristics of the memristors for neuromorphic applications

A Voltage Mode Memristor Bridge Synaptic Circuit with Memristor Emulators

A memristor bridge neural circuit which is able to perform signed synaptic weighting was proposed in our previous study, where the synaptic operation was verified via software simulation of the mathematical model of the HP memristor. This study is an extension of the previous work advancing toward the circuit implementation where the architecture of the memristor bridge synapse is built with memristor emulator circuits. In addition, a simple neural network which performs both synaptic weighting and summation is built by combining memristor emulators-based synapses and differential amplifier circuits. The feasibility of the memristor bridge neural circuit is verified via SPICE simulations

A locally active discrete memristor model and its application in a hyperchaotic map

© 2022 Springer Nature Switzerland AG. Part of Springer Nature. This is the accepted manuscript version of an article which has been published in final form at https://doi.org/10.1007/s11071-021-07132-5The continuous memristor is a popular topic of research in recent years, however, there is rare discussion about the discrete memristor model, especially the locally active discrete memristor model. This paper proposes a locally active discrete memristor model for the first time and proves the three fingerprints characteristics of this model according to the definition of generalized memristor. A novel hyperchaotic map is constructed by coupling the discrete memristor with a two-dimensional generalized square map. The dynamical behaviors are analyzed with attractor phase diagram, bifurcation diagram, Lyapunov exponent spectrum, and dynamic behavior distribution diagram. Numerical simulation analysis shows that there is significant improvement in the hyperchaotic area, the quasi-periodic area and the chaotic complexity of the two-dimensional map when applying the locally active discrete memristor. In addition, antimonotonicity and transient chaos behaviors of system are reported. In particular, the coexisting attractors can be observed in this discrete memristive system, resulting from the different initial values of the memristor. Results of theoretical analysis are well verified with hardware experimental measurements. This paper lays a great foundation for future analysis and engineering application of the discrete memristor and relevant the study of other hyperchaotic maps.Peer reviewedFinal Accepted Versio