5 research outputs found

    Reliability issues in RRAM ternary memories affected by variability and aging mechanisms

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    © 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Resistive switching Random Access Memories (RRAM) are being considered as a promising alternative for conventional memories mainly due to their high speed, scalability, CMOS compatibility, Non-Volatile behavior (NVM), and consequent orientation to low power consumption. Advances in the RRAM technology as well as enhancement of the control of the cells are opening the use of these devices for multi-valued logic. But the cycle-to-cycle variability and the still reduced endurance are becoming serious limitations. This paper analyzes the impact of both mechanisms on 1T1R cells and suggests potential adaptive mechanisms to enlarge its lifetime.Peer ReviewedPostprint (author's final draft

    Simple method for monitoring the switching activity in memristive cross-point arrays with line resistance effects

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    A simple method for monitoring the switching activity (forming, set, reset events and stuck-at-0/1 faults) in memristive cross-point arrays with line resistance effects is proposed. The method consists in correlating incremental current changes in a four-terminal configuration with the location of the switching cell within the array. The potential drops in the interconnection wires as well as the nonlinearity of the switching elements are considered within this approach. The problem is solved by iterating the Kirchhoff's current law for the coupled word and bit lines with appropriate boundary conditions. The main experimental advantage of the proposed method is that only four SMUs (source-measurement unit) are needed to identify the switching cell. In this way, our method could contribute to foster the system-level reliability analysis of cross-point arrays since additional circuitry for the individual addressing of the switching device is not required

    Memristive crossbar memory lifetime evaluation and reconfiguration strategies

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    Among the emerging technologies and devices for highly scalable and low power memory architectures, memristors are considered as one of the most favorable alternatives for next generation memory technologies. They are attracting great attention recently, due to their many appealing characteristics such as non-volatility and compatibility with CMOS fabrication process. But beside all memristor advantages, their drawbacks including manufacturing process variability and limited read/write endurance, could risk their future utilization. This paper will evaluate the impact of reliability concerns in lifetime of memristive crossbars and will present the design basis of two proposed reconfiguration approaches in memristive crossbar- based memories, in order to extend the system lifetime by utilizing available resources in an intense way and without need of failure recovery. It is observed that the adaptive reconfiguring approach can improve the crossbar reliability and extend its lifetime up to 65% in comparison with non-adaptive reconfiguration strategy.Peer Reviewe

    Memristive Crossbar Memory Lifetime Evaluation and Reconfiguration Strategies

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    Memristive crossbar memory lifetime evaluation and reconfiguration strategies

    No full text
    Among the emerging technologies and devices for highly scalable and low power memory architectures, memristors are considered as one of the most favorable alternatives for next generation memory technologies. They are attracting great attention recently, due to their many appealing characteristics such as non-volatility and compatibility with CMOS fabrication process. But beside all memristor advantages, their drawbacks including manufacturing process variability and limited read/write endurance, could risk their future utilization. This paper will evaluate the impact of reliability concerns in lifetime of memristive crossbars and will present the design basis of two proposed reconfiguration approaches in memristive crossbar- based memories, in order to extend the system lifetime by utilizing available resources in an intense way and without need of failure recovery. It is observed that the adaptive reconfiguring approach can improve the crossbar reliability and extend its lifetime up to 65% in comparison with non-adaptive reconfiguration strategy.Peer Reviewe
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