Sub-Nyquist Sampling: Bridging Theory and Practice

Sampling theory encompasses all aspects related to the conversion of continuous-time signals to discrete streams of numbers. The famous Shannon-Nyquist theorem has become a landmark in the development of digital signal processing. In modern applications, an increasingly number of functions is being pushed forward to sophisticated software algorithms, leaving only those delicate finely-tuned tasks for the circuit level. In this paper, we review sampling strategies which target reduction of the ADC rate below Nyquist. Our survey covers classic works from the early 50's of the previous century through recent publications from the past several years. The prime focus is bridging theory and practice, that is to pinpoint the potential of sub-Nyquist strategies to emerge from the math to the hardware. In that spirit, we integrate contemporary theoretical viewpoints, which study signal modeling in a union of subspaces, together with a taste of practical aspects, namely how the avant-garde modalities boil down to concrete signal processing systems. Our hope is that this presentation style will attract the interest of both researchers and engineers in the hope of promoting the sub-Nyquist premise into practical applications, and encouraging further research into this exciting new frontier.Comment: 48 pages, 18 figures, to appear in IEEE Signal Processing Magazin

Advanced techniques for diagnostics and control applied to particle accelerators

201 p.Esta tesis versa en torno a tecnologías y técnicas novedosas orientadas al diagnóstico y control para aceleradores de partículas. Se centra principalmente en el desarrollo de dos aplicaciones para dicho propósito; un monitor de posición de haz (beam position monitor o BPM en inglés) por un lado, y un control de RF denominado sistema de RF de bajo nivel (low-level RF o LLRF en inglés) por el otro. Además, se han desarrollado completos bancos de pruebas, permitiendo de esta manera el testeo de las mencionadas soluciones en el laboratorio. El estudio de técnicas de muestreo y procesamiento digital para su posterior implementación también juega un papel importante en este trabajo.De esta manera, las principales contribuciones de esta tesis son el desarrollo de un BPM y un sistema de control LLRF altamente flexibles y reconfigurables, estando ambos basados en hardware digital. Las soluciones presentadas han sido diseñadas con el objetivo de crear herramientas especialmente adecuadas para labores de investigación en laboratorio. Las aplicaciones obtenidas cumplen este objetivo, mostrando características especialmente valiosas como una rápida etapa de prototipado y alta modularidad.Otra línea de la presente tesis está dirigida al estudio de técnicas avanzadas de muestreo y procesamiento digital de señal, las cuales son posteriormente implementadas en las citadas aplicaciones. Finalmente, la última parte de este trabajo trata sobre la integración de la información producida por estas herramientas de diagnóstico y control en EPICS, un sistema de control ampliamente utilizado en el campo de los aceleradores de partículas

Theory and Design of a Highly Compressed Dropped-Channel Polarimetric Synthetic Aperture Radar

Compressed sensing (CS) is a recent mathematical technique that leverages the sparsity in certain sets of data to solve an underdetermined system and recover a full set of data from a sub-Nyquist set of measurements of the data. Given the size and sparsity of the data, radar has been a natural choice to apply compressed sensing to, typically in the fast-time and slow-time domains. Polarimetric synthetic aperture radar (PolSAR) generates a particularly large amount of data for a given scene; however, the data tends to be sparse. Recently a technique was developed to recover a dropped PolSAR channel by leveraging antenna crosstalk information and using compressed sensing. In this dissertation, we build upon the initial concept of the dropped-channel PolSAR CS in three ways. First, we determine a metric which relates the measurement matrix to the l2 recovery error. The new metric is necessary given the deterministic nature of the measurement matrix. We then determine a range of antenna crosstalk required to recover a dropped PolSAR channel. Second, we propose a new antenna design that incorporates the relatively high levels of crosstalk required by a dropped-channel PolSAR system. Finally, we integrate fast- and slow-time compression schemes into the dropped-channel model in order to leverage sparsity in additional PolSAR domains and overall increase the compression ratio. The completion of these research tasks has allowed a more accurate description of a PolSAR system that compresses in fast-time, slow-time, and polarization; termed herein as highly compressed PolSAR. The description of a highly compressed PolSAR system is a big step towards the development of prototype hardware in the future

Instrumentation for parallel magnetic resonance imaging

Parallel magnetic resonance (MR) imaging may be used to increase either the throughput or the speed of the MR imaging experiment. As such, parallel imaging may be accomplished either through a "parallelization" of the MR experiment, or by the use of arrays of sensors. In parallelization, multiple MR scanners (or multiple sensors) are used to collect images from different samples simultaneously. This allows for an increase in the throughput, not the inherent speed, of the MR experiment. Parallel imaging with arrays of sensor coils, on the other hand, makes use of the spatial localization properties of the sensors in an imaging array to allow a reduction in the number of phase encodes required in acquiring an image. This reduced phase-encoding requirement permits an increase in the overall imaging speed by a factor up to the number of sensors in the imaging array. The focus of this dissertation has been the development of cost-effective instrumentation that would enable advances in the state of the art of parallel MR imaging. First, a low-cost desktop MR scanner was developed (< $13,000) for imaging small samples (2.54 cm fields-of view) at low magnetic field strengths (< 0.25 T). The performance of the prototype was verified through bench-top measurements and phantom imaging. The prototype transceiver has demonstrated an SNR (signal-to-noise ratio) comparable to that of a commercial MR system. This scanner could make parallelization of the MR experiment a practical reality, at least in the areas of small animal research and education. A 64-channel receiver for parallel MR imaging with arrays of sensors was also developed. The receiver prototype was characterized through both bench-top tests and phantom imaging. The parallel receiver is capable of simultaneous reception of up to sixty-four, 1 MHz bandwidth MR signals, at imaging frequencies from 63 to 200 MHz, with an SNR performance (on each channel) comparable to that of a single-channel commercial MR receiver. The prototype should enable investigation into the speed increases obtainable from imaging with large arrays of sensors and has already been used to develop a new parallel imaging technique known as single echo acquisition (SEA) imaging

Satellite Emission Range Inferred Earth Survey (SERIES) project

The Global Positioning System (GPS) was developed by the Department of Defense primarily for navigation use by the United States Armed Forces. The system will consist of a constellation of 18 operational Navigation Satellite Timing and Ranging (NAVSTAR) satellites by the late 1980's. During the last four years, the Satellite Emission Range Inferred Earth Surveying (SERIES) team at the Jet Propulsion Laboratory (JPL) has developed a novel receiver which is the heart of the SERIES geodetic system designed to use signals broadcast from the GPS. This receiver does not require knowledge of the exact code sequence being transmitted. In addition, when two SERIES receivers are used differentially to determine a baseline, few cm accuracies can be obtained. The initial engineering test phase has been completed for the SERIES Project. Baseline lengths, ranging from 150 meters to 171 kilometers, have been measured with 0.3 cm to 7 cm accuracies. This technology, which is sponsored by the NASA Geodynamics Program, has been developed at JPL to meet the challenge for high precision, cost-effective geodesy, and to complement the mobile Very Long Baseline Interferometry (VLBI) system for Earth surveying

The design and implementation of a wideband digital radio receiver

Historically radio has been implemented using largely analogue circuitry. Improvements in mixed signal and digital signal processing technology are rapidly leading towards a largely digital approach, with down-conversion and filtering moving to the digital signal processing domain. Advantages of this technology include increased performance and functionality, as well as reduced cost. Wideband receivers place the heaviest demands on both mixed signal and digital signal processing technology, requiring high spurious free dynamic range (SFDR) and signal processing bandwidths. This dissertation investigates the extent to which current digital technology is able to meet these demands and compete with the proven architectures of analogue receivers. A scalable generalised digital radio receiver capable of operating in the HF and VHF bands was designed, implemented and tested, yielding instantaneous bandwidths in excess of 10 MHz with a spurious-free dynamic range exceeding 80 decibels below carrier (dBc). The results achieved reflect favourably on the digital receiver architecture. While the necessity for minimal analogue circuitry will possibly always exist, digital radio architectures are currently able to compete with analogue counterparts. The digital receiver is simple to manufacture, based on the use of largely commercial off-the-shelf (COTS) components, and exhibits extreme flexibility and high performance when compared with comparably priced analogue receivers

Clock Jitter in Communication Systems

For reliable digital communication between devices, the sources that contribute to data sampling errors must be properly modeled and understood. Clock jitter is one such error source occurring during data transfer between integrated circuits. Clock jitter is a noise source in a communication link similar to electrical noise, but is a time domain noise variable affecting many different parts of the sampling process. Presented in this dissertation, the clock jitter effect on sampling is modeled for communication systems with the degree of accuracy needed for modern high speed data communication. The models developed and presented here have been used to develop the clocking specifications and silicon budgets for industry standards such as PCI Express, USB3.0, GDDR5 Memory, and HBM Memory interfaces