Self-checking multiple-valued circuit based on dual-rail current-mode differential logic

科研費報告書収録論文(課題番号:09558027・基盤研究(B)(2)・H9～H12/研究代表者:羽生, 貴弘/1トランジスタセル多値連想メモリの試作とその応用

Low-power dual-rail multiple-valued current-mode logic circuit using multiple input-signal levels

科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム

Fully source-coupled logic based multiple-valued VLSI

科研費報告書収録論文(課題番号:12480064・基盤研究(B)(2) ・H12～H14/研究代表者:亀山, 充隆/配線ボトルネックフリー2線式多値ディジタルコンピューティングVLSIシステム

Design and characterisation of a ferroelectric liquid crystal over silicon spatial light modulator

Many optical processing systems rely critically on the availability of high performance, electrically-addressed spatial light modulators. Ferroelectric liquid crystal over silicon is an attractive spatial light modulator technology because it combines two well matched technologies. Ferroelectric liquid crystal modulating materials exhibit fast switching times with low operating voltages, while very large scale silicon integrated circuits offer high-frequency, low power operation, and versatile functionality. This thesis describes the design and characterisation of the SBS256 - a general purpose 256 x 256 pixel ferroelectric liquid crystal over silicon spatial light modulator that incorporates a static-RAM latch and an exclusive-OR gate at each pixel. The static-RAM latch provides robust data storage under high read-beam intensities, while the exclusive-OR gate permits the liquid crystal layer to be fully and efficiently charge balanced. The SBS256 spatial light modulator operates in a binary mode. However, many applications, including helmet-mounted displays and optoelectronic implementations of artificial neural networks, require devices with some level of grey-scale capability. The 2 kHz frame rate of the device, permits temporal multiplexing to be used as a means of generating discrete grey-scale in real-time. A second integrated circuit design is also presented. This prototype neuraldetector backplane consists of a 4 x 4 array of optical-in, electronic-out processing units. These can sample the temporally multiplexed grey-scale generated by the SBS256. The neurons implement the post-synaptic summing and thresholding function, and can respond to both positive and negative activations - a requirement of many artificial neural network models