Modeling and Validation of 4H-SiC Low Voltage MOSFETs for Integrated Circuit Design

Silicon Carbide is a promising wide bandgap material and gradually becoming the first choice of semiconductor for high density and high efficiency power electronics in medium voltage range (500-1500V). SiC has also excellent thermal conductivity and the devices fabricated with the material can operate at high temperature (~ 400 ⁰C). Thus, a power electronic system built with SiC devices requires less cooling requirement and saves board space and cost. The high temperature applications of SiC material can also be extended to space exploration, oil and gas rigging, aerospace and geothermal energy systems for data acquisition, sensing and instrumentation and power conditioning and conversion. But the high temperature capability of SiC can only be utilized when the integrated circuits can be designed in SiC technology and high fidelity compact models of the semiconductor devices are a priori for reliable and high yielding integrated circuit design. The objective of this work is to develop industry standard compact models for SiC NMOS and PMOS devices. A widely used compact model used in silicon industry called BSIM3V3 is adopted as a foundation to build the model for SiC MOSFET. The models optimized with the built-in HSPICE BSIM3V3.3 were used for circuit design in one tape-out but BSIM3V3 was found to be inadequate to model all of the characteristics of SiC MOSFET due to the presence of interface trapped charge. In the second tape-out, the models for SiC NMOS and PMOS were optimized based on the built-in HSPICE BSIM4V6.5 and a number of functioning circuits which have been published in reputed journal and conference were designed based on the models. Although BSIM4 is an enhanced version of BSIM3V3, it also could not model a few deviant SiC MOSFET characteristics such as body effect, soft saturation etc. The new model developed for SiC NMOS and PMOS based on BSIM4V7.0 is called BSIM4SIC and can model the entire range of device characteristics of the devices. The BSIM4SIC models are validated with a wide range of measured data and verified using the models in the simulation of numerous circuits such as op-amp, comparator, linear regulator, reference and ADC/DAC

Advances in Solid State Circuit Technologies

This book brings together contributions from experts in the fields to describe the current status of important topics in solid-state circuit technologies. It consists of 20 chapters which are grouped under the following categories: general information, circuits and devices, materials, and characterization techniques. These chapters have been written by renowned experts in the respective fields making this book valuable to the integrated circuits and materials science communities. It is intended for a diverse readership including electrical engineers and material scientists in the industry and academic institutions. Readers will be able to familiarize themselves with the latest technologies in the various fields

Reliability Analysis of Power Electronic Devices

The thesis deals with the reliability of Power Electronic Devices to the purpose of evaluating the phenomena which mainly dictate the limiting conditions where a power device can safely operate. Reliability analyses are conducted by means of either simulations and experimental measurements

Energy Efficient RF Transmitter Design using Enhanced Breakdown Voltage SOI-CMOS Compatible MESFETs

abstract: The high cut-off frequency of deep sub-micron CMOS technologies has enabled the integration of radio frequency (RF) transceivers with digital circuits. However, the challenging point is the integration of RF power amplifiers, mainly due to the low breakdown voltage of CMOS transistors. Silicon-on-insulator (SOI) metal semiconductor field effect transistors (MESFETs) have been introduced to remedy the limited headroom concern in CMOS technologies. The MESFETs presented in this thesis have been fabricated on different SOI-CMOS processes without making any change to the standard fabrication steps and offer 2-30 times higher breakdown voltage than the MOSFETs on the same process. This thesis explains the design steps of high efficiency and wideband RF transmitters using the proposed SOI-CMOS compatible MESFETs. This task involves DC and RF characterization of MESFET devices, along with providing a compact Spice model for simulation purposes. This thesis presents the design of several SOI-MESFET RF power amplifiers operating at 433, 900 and 1800 MHz with ~40% bandwidth. Measurement results show a peak power added efficiency (PAE) of 55% and a peak output power of 22.5 dBm. The RF-PAs were designed to operate in Class-AB mode to minimize the linearity degradation. Class-AB power amplifiers lead to poor power added efficiency, especially when fed with signals with high peak to average power ratio (PAPR) such as wideband code division multiple access (W-CDMA). Polar transmitters have been introduced to improve the efficiency of RF-PAs at backed-off powers. A MESFET based envelope tracking (ET) polar transmitter was designed and measured. A low drop-out voltage regulator (LDO) was used as the supply modulator of this polar transmitter. MESFETs are depletion mode devices; therefore, they can be configured in a source follower configuration to have better stability and higher bandwidth that MOSFET based LDOs. Measurement results show 350 MHz bandwidth while driving a 10 pF capacitive load. A novel polar transmitter is introduced in this thesis to alleviate some of the limitations associated with polar transmitters. The proposed architecture uses the backgate terminal of a partially depleted transistor on SOI process, which relaxes the bandwidth and efficiency requirements of the envelope amplifier in a polar transmitter. The measurement results of the proposed transmitter demonstrate more than three times PAE improvement at 6-dB backed-off output power, compared to the traditional RF transmitters.Dissertation/ThesisPh.D. Electrical Engineering 201

Modelação não-linear de transistores de potência para RF e microondas

Doutoramento em Engenharia Electrotécnic

Silicon carbide technology for extreme environments

PhD ThesisWith mankind’s ever increasing curiosity to explore the unknown, including a variety of hostile environments where we cannot tread, there exists a need for machines to do work on our behalf. For applications in the most extreme environments and applications silicon based electronics cannot function, and there is a requirement for circuits and sensors to be built from wide band gap materials capable of operation in these domains. This work addresses the initial development of silicon carbide circuits to monitor conditions and transmit information from such hostile environments. The characterisation, simulation and implementation of silicon carbide based circuits utilising proprietary high temperature passives is explored. Silicon carbide is a wide band gap semiconductor material with highly suitable properties for high-power, high frequency and high temperature applications. The bandgap varies depending on polytype, but the most commonly used polytype 4H, has a value of 3.265 eV at room temperature, which reduces as the thermal ionization of electrons from the valence band to the conduction band increases, allowing operation in ambient up to 600°C. Whilst silicon carbide allows for the growth of a native oxide, the quality has limitations and therefore junction field effect transistors (JFETs) have been utilised as the switch in this work. The characteristics of JFET devices are similar to those of early thermionic valve technology and their use in circuits is well known. In conjunction with JFETs, Schottky barrier diodes (SBDs) have been used as both varactors and rectifiers. Simulation models for high temperature components have been created through their characterisation of their electrical parameters at elevated temperatures. The JFETs were characterised at temperatures up to 573K, and values for TO V , β , λ , IS , RS and junction capacitances were extracted and then used to mathematically describe the operation of circuits using SPICE. The transconductance of SiC JFETs at high temperatures has been shown to decrease quadratically indicating a strong dependence upon carrier mobility in the channel. The channel resistance also decreased quadratically as a direct result of both electric field and temperature enhanced trap emission. The JFETs were tested to be operational up to 775K, where they failed due to delamination of an external passivation layer. ii Schottky diodes were characterised up to 573K, across the temperature range and values for ideality factor, capacitance, series resistance and forward voltage drop were extracted to mathematically model the devices. The series resistance of a SiC SBD exhibited a quadratic relationship with temperature indicating that it is dominated by optical phonon scattering of charge carriers. The observed deviation from a temperature independent ideality factor is due to the recombination of carriers in the depletion region affected by both traps and the formation of an interfacial layer at the SiC/metal interface. To compliment the silicon carbide active devices utilised in this work, high temperature passive devices and packaging/circuit boards were developed. Both HfO2 and AlN materials were investigated for use as potential high temperature capacitor dielectrics in metal-insulator-metal (MIM) capacitor structures. The different thicknesses of HfO2 (60nm and 90nm) and 300nm for AlN and the relevance to fabrication techniques are examined and their effective capacitor behaviour at high temperature explored. The HfO2 based capacitor structures exhibited high levels of leakage current at temperatures above 100°C. Along with elevated leakage when subjected to higher electric fields. This current leakage is due to the thin dielectric and high defect density and essentially turns the capacitors into high value resistors in the order of MΩ. This renders the devices unsuitable as capacitors in hostile environments at the scales tested. To address this issue AlN capacitors with a greater dielectric film thickness were fabricated with reduced leakage currents in comparison even at an electric field of 50MV/cm at 600K. The work demonstrated the world’s first high temperature wireless sensor node powered using energy harvesting technology, capable of operation at 573K. The module demonstrated the world’s first amplitude modulation (AM) and frequency modulation (FM) communication techniques at high temperature. It also demonstrated a novel high temperature self oscillating boost converter cable of boosting voltages from a thermoelectric generator also operating at this temperature. The AM oscillator operated at a maximum temperature of 553K and at a frequency of 19.4MHz with a signal amplitude 65dB above background noise. Realised from JFETs and HfO2 capacitors, modulation of the output signal was achieved by varying the load resistance by use of a second SiC JFET. By applying a negative signal voltage of between -2.5 and -3V, a 50% reduction in the signal amplitude and therefore Amplitude Modulation was achieved by modulating the power within the oscillator through the use of this secondary JFET. Temperature drift in the characteristics were also observed, iii with a decrease in oscillation frequency of almost 200 kHz when the temperature changed from 300K to 573K. This decrease is due to the increase in capacitance density of the HfO2 MIM capacitors and increasing junction capacitances of the JFET used as the amplifier within the oscillator circuit. Direct frequency modulation of a SiC Voltage Controlled Oscillator was demonstrated at a temperature of 573K with a oscillation frequency of 17MHz. Realised from an SiC JFET, AlN capacitors and a SiC SBD used as a varactor. It was possible to vary the frequency of oscillations by 100 kHz with an input signal no greater than 1.5V being applied to the SiC SBD. The effects of temperature drift were more dramatic in comparison to the AM circuit at 400 kHz over the entire temperature range, a result of the properties of the AlN film which causes the capacitors to increase in capacitance density by 10%. A novel self oscillating boost converter was commissioned using a counter wound transformer on high temperature ferrite, a SiC JFET and a SiC SBD. Based upon the operation of a free running blocking oscillator, oscillatory behaviour is a result of the electric and magnetic variations in the winding of the transformer and the amplification characteristics of a JFET. It demonstrated the ability to boost an input voltage of 1.3 volts to 3.9 volts at 573K and exhibited an efficiency of 30% at room temperature. The frequency of operation was highly dependent upon the input voltage due to the increased current flow through the primary coil portion of the transformer and the ambient temperature causing an increase in permeability of the ferrite, thus altering the inductance of both primary and secondary windings. However due its simplicity and its ability to boost the input voltage by 250% meant it was capable of powering the transmitters and in conjunction with a Themoelectric Generator so formed the basis for a self powered high temperature silicon carbide sensor node. The demonstration of these high temperature circuits provide the initial stages of being able to produce a high temperature wireless sensor node capable of operation in hostile environments. Utilising the self oscillating boost converter and a high temperature Thermoelectric Generator these prototype circuits were showed the ability to harvest energy from the high temperature ambient and power the silicon carbide circuitry. Along with appropriate sensor technology it demonstrated the feasibility of being able to monitor and transmit information from hazardous locations which is currently unachievable

Driving and Protection of High Density High Temperature Power Module for Electric Vehicle Application

There has been an increasing trend for the commercialization of electric vehicles (EVs) to reduce greenhouse gas emissions and dependence on petroleum. However, a key technical barrier to their wide application is the development of high power density electric drive systems due to limited space within EVs. High temperature environment inherent in EVs further introduces a new level of complexity. Under high power density and high temperature operation, system reliability and safety also become important. This dissertation deals with the development of advanced driving and protection technologies for high temperature high density power module capable of operating under the harsh environment of electric vehicles, while ensuring system reliability and safety under short circuit conditions. Several related research topics will be discussed in this dissertation. First, an active gate driver (AGD) for IGBT modules is proposed to improve their overall switching performance. The proposed one has the capability of reducing the switching loss, delay time, and Miller plateau duration during turn-on and turn-off transient without sacrificing current and voltage stress. Second, a board-level integrated silicon carbide (SiC) MOSFET power module is developed for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI) based gate driver board is designed and fabricated through chip-on-board (COB) technique. Also, a 1200 V / 100 A SiC MOSFET phase-leg power module is developed utilizing high temperature packaging technologies. Third, a comprehensive short circuit ruggedness evaluation and numerical investigation of up-to-date commercial silicon carbide (SiC) MOSFETs is presented. The short circuit capability of three types of commercial 1200 V SiC MOSFETs is tested under various conditions. The experimental short circuit behaviors are compared and analyzed through numerical thermal dynamic simulation. Finally, according to the short circuit ruggedness evaluation results, three short circuit protection methods are proposed to improve the reliability and overall cost of the SiC MOSFET based converter. A comparison is made in terms of fault response time, temperature dependent characteristics, and applications to help designers select a proper protection method

III-V Nanowire MOSFET High-Frequency Technology Platform

This thesis addresses the main challenges in using III-V nanowireMOSFETs for high-frequency applications by building a III-Vvertical nanowire MOSFET technology library. The initial devicelayout is designed, based on the assessment of the current III-V verticalnanowire MOSFET with state-of-the-art performance. The layout providesan option to scale device dimensions for the purpose of designing varioushigh-frequency circuits. The nanowire MOSFET device is described using1D transport theory, and modeled with a compact virtual source model.Device assessment is performed at high frequencies, where sidewall spaceroverlaps have been identified and mitigated in subsequent design iterations.In the final stage of the design, the device is simulated with fT > 500 GHz,and fmax > 700 GHz.Alongside the III-V vertical nanowire device technology platform, adedicated and adopted RF and mm-wave back-end-of-line (BEOL) hasbeen developed. Investigation into the transmission line parameters revealsa line attenuation of 0.5 dB/mm at 50 GHz, corresponding to state-ofthe-art values in many mm-wave integrated circuit technologies. Severalkey passive components have been characterized and modeled. The deviceinterface module - an interconnect via stack, is one of the prominentcomponents. Additionally, the approach is used to integrate ferroelectricMOS capacitors, in a unique setting where their ferroelectric behavior iscaptured at RF and mm-wave frequencies.Finally, circuits have been designed. A proof-of-concept circuit, designedand fabricated with III-V lateral nanowire MOSFETs and mm-wave BEOL, validates the accuracy of the BEOL models, and the circuit design. Thedevice scaling is shown to be reflected into circuit performance, in aunique device characterization through an amplifier noise-matched inputstage. Furthermore, vertical-nanowire-MOSFET-based circuits have beendesigned with passive feedback components that resonate with the devicegate-drain capacitance. The concept enables for device unilateralizationand gain boosting. The designed low-noise amplifiers have matching pointsindependent on the MOSFET gate length, based on capacitance balancebetween the intrinsic and extrinsic capacitance contributions, in a verticalgeometry. The proposed technology platform offers flexibility in device andcircuit design and provides novel III-V vertical nanowire MOSFET devicesand circuits as a viable option to future wireless communication systems

Electrothermal simulation and characterisation of series connected power devices and converter applications

Power electronics is undergoing significant changes both at the device and at the converter level. Wide bandgap power devices like SiC MOSFETs are increasingly implemented in automotive, grid and industrial drive applications with voltage ratings as high as 1.7kV now commercially available although much higher voltages have been demonstrated as research prototypes. In high power applications where high DC bus voltages are used, as is the case in voltage source converters for industrial drives, marine propulsion and grid connected energy conversion systems, it may be necessary to series connect power devices for OFF-state voltage sharing. In high power applications, before the advent of multi-level converters, series connection of IGBT power modules was commonplace especially for HVDC-voltage source converter applications. However, with the advent of the modular multi-level converter, where the AC voltage waveform is synthesized by discrete voltage steps, the need for series connected is obviated. Most HVDC-VSC applications are now implemented by modular-multi-level converters. However, in some applications like VSCs for distribution network power conversion, there can be a combination between series connection of power devices and multi-level converter. Traditionally, voltage balancing in series connected power devices was achieved using snubber capacitors for dynamic voltage sharing and resistors for static voltage sharing. However, the use of snubber capacitors reduces the switching speed of the converter thereby defeating the purpose of using SiC power devices especially in power converters with high switching frequencies. To avoid this, active gate driving techniques that avoid the use of snubber capacitors during switching are under intensive research focus. This involves intelligent gate drivers capable of dynamically adjusting the gate pulse during switching. To use these gate drivers, it is necessary to explore the boundaries of static and dynamic voltage imbalance in series connected power devices. For example, it is necessary to understand how differences in device junction temperature and gate driver switching rates affects voltage divergence between series connected devices and how this differs between silicon IGBTs and SiC MOSFETs. This is similarly the case between series connected silicon PiN diodes and SiC Schottky diodes. Since silicon IGBTs and PiN diodes respectively exhibit tails currents and reverse recovery during turn-OFF, the dynamics of voltage divergence between series devices will differ from unipolar SiC power devices. Furthermore, the leakage current mechanisms determine the OFF-state voltage balancing dynamics and since Si IGBTs have different leakage current mechanisms from SiC devices, OFF-state voltage balancing in series connected devices will be different between the technologies. The contribution of this thesis is using finite element and compact device models backed by experimental measurements to investigate static and dynamic voltage imbalance in series connected power devices. Starting from the fundamental physics behind device operation, this thesis explores how the leakage currents and tail currents affects voltage divergence in series silicon bipolar devices compared to SiC power devices. This analysis is compared with how the switching dynamics peculiar to fast switching SiC devices affects voltage balancing in series connected SiC devices. Simulations and measurements show that series connected SiC power devices are less prone of excessive voltage divergence due to the absence of tail currents compared to series connected silicon bipolar devices where voltage divergence due to tail currents is evident. Reduced leakage currents due to the wide bandgap in SiC also ensures that it is less prone to voltage divergence (compared to silicon bipolar devices) under static OFF-state conditions. This means the snubber resistances can be increased thereby reducing the OFF-state power dissipation in series connected SiC devices. In the analysis of voltage sharing of series connected devices during the static ON-state and OFF-state it was shown that the zero-temperature coefficient of the power devices determines the voltage sharing and loss distribution in the ON-state while the leakage current and switching synchronization is critical in the OFF-state. Simulations and measurements in this thesis show that the higher ZTC points in silicon bipolar devices compared to SiC unipolar devices means that ON-state voltage divergence depends on the load current. The dominant failure mode for series connected power devices is failure under dynamic avalanche which occurs in cases of extreme uncontrolled voltage divergence. In the investigations of the switching transient behaviour of series connected IGBT and SiC MOSFETs during turn-OFF, it was shown that the voltage imbalance for Si IGBT is highly dependent on the carrier concentration in the drift region during switching while for SiC MOSFET it depends on the switching time constant of the gate voltage and the rate that the MOS-channel cuts the current. The thesis also explores the limits of power device performance under dynamic avalanche conditions for both series silicon bipolar and SiC unipolar devices. In the analysis of SOA of series connected devices it was discussed that the SOA is reduced by increased switching rates and DC link voltages. Finally, the thesis explores the 3L-NPC converter and how the power factor of the load on the AC side of the converter alters the power dissipation sharing between the devices. The results show that loss distribution between the devices in the converter is not just affected by the load power factor but also by the switching frequency