Optimizations of sub-100 nm Si/SiGe MODFETs for high linearity RF applications

Based on careful calibration in respect of 70 nm n-type strained Si channel S/SiGe modulation doped FETs (MODFETs) fabricated by Daimler Chrysler, numerical simulations have been used to study the impact of the device geometry and various doping strategies on device performance and linearity. The device geometry is sensitive to both RF performance and device linearity. Doped channel devices are found to be promising for high linearity applications. Trade-off design strategies are required for reconciling the demands of high device performance and high linearity simultaneously. The simulations also suggest that gate length scaling helps to achieve higher RF performance, but decreases the linearity

Monte Carlo investigation of optimal device architectures for SiGe FETs

Strained silicon channel FETs grown on virtual SiGe substrates show clear potential for RF applications, in a material system compatible with silicon VLSI. However, the optimisation of practical RF devices requires some care. 0.1-0.12 μm gate length designs are investigated using Monte Carlo techniques. Although structures based on III-V experience show fT values of up to 94 GHz, more realistic designs are shown to be limited by parallel conduction and ill constrained effective channel lengths. Aggressively scaled SiGe devices, following state-of-the-art CMOS technologies, show fT values of up to 80 GHz

A SiGe HEMT Mixer IC with Low Conversion Loss

The authors present the first SiGe HEMT mixer integrated circuit. The active mixer stage, operating up to 10GHz RF, has been designed and realized using a 0.1µ µµ µm gate length transistor technology. The design is based on a new large-signal simulation model developed for the SiGe HEMT. Good agreement between simulation and measurement is reached. The mixer exhibits 4.0dB and 4.7dB conversion loss when down-converting 3.0GHz and 6.0GHz signals, respectively, to an intermediate frequency of 500MHz using high-side injection of 5dBm local oscillator power. Conversion loss is less than 8dB for RF frequencies up to 10GHz with a mixer linearity of –8.8dBm input related 1dB compression point

RF performance of strained Si MODFETs and MOSFETs on "virtual" SiGe substrates: A Monte Carlo study

No abstract avaliable

Accurate on-wafer power and harmonic measurements of mm-wave amplifiers and devices

A novel integrated test system that accurately measures on-wafer S-parameters, power levels, load-pull contours and harmonics over 1 to 50 GHz is presented. The system measures power and S-parameters with single contact measurements and integrated hardware. There are two keys to this system: first, the network analyzer samplers are used as frequency-selective power meters with large dynamic ranges; second, all measurements are vector-corrected to the device under test reference planes. The capabilities and accuracy were demonstrated by measuring the power at the fundamental frequency and four harmonic frequencies of a 50-GHz traveling wave amplifier and the load-pull contours of a MODFET at 30 GH

High Mobility SiGe/Si n-Type Structures and Field Effect Transistors on Sapphire Substrates

SiGe/Si n-type modulation doped field effect transistors (MODFETs) fabricated on sapphire substrates have been characterized at microwave frequencies for the first time. The highest measured room temperature electron mobility is 1380 sq cm/V-sec at a carrier density of 1.8 x 10(exp 12)/sq cm for a MODFET structure, and 900 sq cm/V-sec at a carrier density of 1.3 x 10/sq cm for a phosphorus ion implanted sample. A two finger, 2 x 200 micron gate n-MODFET has a peak transconductance of 37 mS/mm at a drain to source voltage of 2.5 V and a transducer gain of 6.4 dB at 1 GHz

Interface charged impurity scattering in semiconductor MOSFETs and MODFETs: temperature dependent resistivity and 2D "metallic" behavior

We present the results on the anomalous 2D transport behavior by employing Drude-Boltzmann transport theory and taking into account the realistic charge impurity scattering effects. Our results show quantitative agreement with the existing experimental data in several different systems and address the origin of the strong and non-monotonic temperature dependent resistivity.Comment: Presented at SIMD, Dec. 1999 in Hawaii. To be published in Superlattices and Microstructures, May 2000 issu

Scaling study of Si/SiGe MODFETs for RF applications

Based on the successful calibration on a 0.25 /spl mu/m strained Si/SiGe n-type MODFET, this paper presents a gate length scaling study of double-side doped Si/SiGe MODFETs. Our simulations show that gate length scaling improves device RF performance. However, the short channel effects (SCE) along with the parasitic delays limit the device performance improvements. We find that it is necessary to consider scaling (dimensions and doping) of both the lateral and vertical architecture in order to optimize the device design

Physics of InAIAs/InGaAs Heterostructure Field-Effect Transistors

Contains an introduction, reports on two research projects and a list of publications and conference papers.Charles S. Draper Laboratories Contract DL-H-441694Joint Services Electronics Program Contract DAAL03-92-C-0001Texas Instruments Agreement dated 08/14/9

'Backgating' model including self-heating for low-frequency dispersive effects in III-V FETs

A new approach is proposed which takes into account both traps and thermal phenomena for the modelling of deviations between static and dynamic drain current characteristics in III-V field effect transistors. The model is based on the well-known `backgating' concept and can easily be identified on the basis of conventional static drain current characteristics and small-signal, low-frequency S parameters. Experimental results confirm the accuracy of the proposed mode