Selected Papers from the International Mixed Signals Testing and GHz/Gbps Test Workshop

This special issue of the VLSI Design journal isdedicated to the 13th IEEE International Mixed Signals Testing Workshop (IMSTW)and 3rd IEEE International GHz/Gbps Test Workshop (GTW), held in June 2007 at Póvoa de Varzim, Portugal

High Speed Test Interface Module Using MEMS Technology

With the transient frequency of available CMOS technologies exceeding hundreds of gigahertz and the increasing complexity of Integrated Circuit (IC) designs, it is now apparent that the architecture of current testers needs to be greatly improved to keep up with the formidable challenges ahead. Test requirements for modern integrated circuits are becoming more stringent, complex and costly. These requirements include an increasing number of test channels, higher test-speeds and enhanced measurement accuracy and resolution. In a conventional test configuration, the signal path from Automatic Test Equipment (ATE) to the Device-Under-Test (DUT) includes long traces of wires. At frequencies above a few gigahertz, testing integrated circuits becomes a challenging task. The effects on transmission lines become critical requiring impedance matching to minimize signal reflection. AC resistance due to the skin effect and electromagnetic coupling caused by radiation can also become important factors affecting the test results. In the design of a Device Interface Board (DIB), the greater the physical separation of the DUT and the ATE pin electronics, the greater the distortion and signal degradation. In this work, a new Test Interface Module (TIM) based on MEMS technology is proposed to reduce the distance between the tester and device-under-test by orders of magnitude. The proposed solution increases the bandwidth of test channels and reduces the undesired effects of transmission lines on the test results. The MEMS test interface includes a fixed socket and a removable socket. The removable socket incorporates MEMS contact springs to provide temporary with the DUT pads and the fixed socket contains a bed of micro-pins to establish electrical connections with the ATE pin electronics. The MEMS based contact springs have been modified to implement a high-density wafer level test probes for Through Silicon Vias (TSVs) in three dimensional integrated circuits (3D-IC). Prototypes have been fabricated using Silicon On Insulator SOI wafer. Experimental results indicate that the proposed architectures can operate up to 50 GHz without much loss or distortion. The MEMS probes can also maintain a good elastic performance without any damage or deformation in the test phase

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

Topical Workshop on Electronics for Particle Physics

The purpose of the workshop was to present results and original concepts for electronics research and development relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities; to review the status of electronics for the LHC experiments; to identify and encourage common efforts for the development of electronics; and to promote information exchange and collaboration in the relevant engineering and physics communities

Shortest Route at Dynamic Location with Node Combination-Dijkstra Algorithm

Abstract— Online transportation has become a basic requirement of the general public in support of all activities to go to work, school or vacation to the sights. Public transportation services compete to provide the best service so that consumers feel comfortable using the services offered, so that all activities are noticed, one of them is the search for the shortest route in picking the buyer or delivering to the destination. Node Combination method can minimize memory usage and this methode is more optimal when compared to A* and Ant Colony in the shortest route search like Dijkstra algorithm, but can’t store the history node that has been passed. Therefore, using node combination algorithm is very good in searching the shortest distance is not the shortest route. This paper is structured to modify the node combination algorithm to solve the problem of finding the shortest route at the dynamic location obtained from the transport fleet by displaying the nodes that have the shortest distance and will be implemented in the geographic information system in the form of map to facilitate the use of the system. Keywords— Shortest Path, Algorithm Dijkstra, Node Combination, Dynamic Location (key words

MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing

We describe the use of microelectromechanical system (MEMS) switches and SiGe logic devices for both passive and active loopback testing of wide data buses at rates up to 6.4 Gbps per signal. Target applications include HyperTransport, fully buffered DIMM, and PCI Express, among others. Recently introduced MEMS devices provide >7 GHz bandwidth in a very small package (needed to handle wide buses). SiGe logic supports >7 Gbps signals when active shaping of the waveform is required. Each loopback module typically supports between 9 and 16 differential channels. Multiple cards are used to handle applications with very wide buses or multiple ports. Passive cards utilize MEMS for switching between the loopback (self-test) mode and traditional automated test equipment (ATE) source/receiver channels. Future active card designs may provide additional waveform-shaping functions, such as buffering, amplitude attenuation/modulation, deskew, delay adjustment, jitter injection, and so forth. The modular approach permits precalibration of the loopback electronics and easy reconfiguration between debug or characterization testing and high-volume production screening

Investigations into a multiplexed fibre interferometer for on-line, nanoscale, surface metrology

Current trends in technology are leading to a need for ever smaller and more complex featured surfaces. The techniques for manufacturing these surfaces are varied but are tied together by one limitation; the lack of useable, on-line metrology instrumentation. Current metrology methods require the removal of a workpiece for characterisation which leads to machining down-time, more intensive labour and generally presents a bottle neck for throughput. In order to establish a new method for on-line metrology at the nanoscale investigation are made into the use of optical fibre interferometry to realise a compact probe that is robust to environmental disturbance. Wavelength tuning is combined with a dispersive element to provide a moveable optical stylus that sweeps the surface. The phase variation caused by the surface topography is then analysed using phase shifting interferometry. A second interferometer is wavelength multiplexed into the optical circuit in order to track the inherent instability of the optical fibre. This is then countered using a closed loop control to servo the path lengths mechanically which additionally counters external vibration on the measurand. The overall stability is found to be limited by polarisation state evolution however. A second method is then investigated and a rapid phase shifting technique is employed in conjunction with an electro-optic phase modulator to overcome the polarisation state evolution. Closed loop servo control is realised with no mechanical movement and a step height artefact is measured. The measurement result shows good correlation with a measurement taken with a commercial white light interferometer