Wireless Power Transfer System for Battery-Less Body Implantable Devices

Department of Electrical EngineeringAs the life expectancy is increased and the welfare is promoted, researches on the body implantable medical devices (BIMD) are actively being carried out, and products providing more various functions are being released. On the other hand, due to these various functions, the power consumption of the BIMD is also increased, so that the primary battery alone cannot provide sufficient power for the devices. The limited capacity and life time of batteries force patients to make an additional payment and suffering for the power supply of the BIMD. Wireless power transfer technology is the technology which has been making remarkable progress mainly in wireless charging for personal portable devices and electric vehicles. Convergence of wireless power transfer technology (WPT) and rechargeable battery can extend the life time of the BIMD and reduce the suffering and the cost for battery replacements. Furthermore, WPT enables the devices which do not need to operate consistently such as body implantable sensor devices to be used without batteries. In this dissertation, techniques to support WPT for BIMD are introduced and proposed. First, basic researches on magnetic coupled WPT are presented. The basics which are important factors to analyze power transmission are introduced. In addition, circuits that make up the WPT system are described. There are three common technical challenges in WPT. Those are efficiency degradation on coil geometry, voltage gain variation with coil geometry, and power losses in WPT. The common challenges are discussed in chapter II. Moreover, additional challenges which are arisen in WPT for BIMD and approaches to resolve the challenges are addressed in chapter II. Then, efficiency improvement techniques and control techniques in WPT are presented in chapter III. The presented techniques to improve efficiency are applied in coil parts and circuit parts. In coil parts, efficiency enhancement technique by geometric variation is proposed. In circuit parts, instantaneous power consuming technique for step-down converter is suggested. Li-ion battery charger is also discussed in chapter III. Additionally, the wireless controlled constant current / constant voltage charging mode and the proposed step charging method are described. After that, WPT system for BIMD is discussed one by one with the proposed techniques for each part in chapter IV. A load transformation is suggested to improve efficiency in weak coupling, and suppress voltage gain variation under coil displacement. Power conversion efficiency improvement techniques for rectifier and converter are also proposed. By using the proposed technique for the converter, we can remove the bootstrap capacitors, and reduce the overall size of power circuits. In conclusion, techniques in coil parts and circuit parts to handle challenges in WPT for BIMD are fully investigated in this thesis in addition to the efficiency improvement and control techniques in common WPT. All the techniques are verified through simulations or experiments. The approaches realized in the thesis can be applied to other applications employing the WPT.clos

Efficient Low Power Headphone Driver

In recent years, the consumer electronics market for battery-powered devices such as smartphones and tablets has been rapidly expanding. The requirements for audio CODEC in these portable devices have extended from merely supporting voice calls to high-fidelity music playback. As a result, audio driver performance has become one of the most important differentiating factors among products from different suppliers. There are three basic performance metrics that are typically used to benchmark audio modules: the maximum delivered output power, the audio fidelity measured in terms of dynamic range, THD+N, and finally the battery life. Maximizing all three of these performance metrics has proven to be an exceptionally hard task as portrayed by the research publications.This work presents an attempt to push all three of these metrics together and provide an acceptable balance which is achieved by selecting the right topology. Conventionally, headphone drivers are designed using a linear amplifier topology for many reasons- most prominently- to achieve a superior THD+N and PSRR requirement which in the past was essentially the only key performance metric needed. This came at the expense of realizing mediocre power efficiency targets, thereby wasting battery life. This picture changed dramatically over the last decade with smartphones and other portable devices becoming the first choice of the young generation. These devices are extremely power hungry due to the unlimited functions and features they provide and therefore battery life has come to the spotlight as a key resource that need to be preserved. As a result, in this work a headphone driver is based on a switching topology that is able to deliver more than 230mW of power (or equivalently 2Vrms) to a 16Ω load while achieving better than -98dB of THD+N , more than 108dB of SNR, and about 108dB PSRR while still maintaining a peak power efficiency of more than 84%

Power Management Circuits for Front-End ASICs Employed in High Energy Physics Applications

The instrumentation of radiation detectors for high energy physics calls for the development of very low-noise application-specific integrated-circuits and demanding system-level design strategies, with a particular focus on the minimisation of inter-ference noise from power anagement circuitry. On the other hand, the aggressive pixelisation of sensors and associated front-end electronics, and the high radiation exposure at the innermost tracking and vertex detectors, requires radiation-aware design and radiation-tolerant deep sub-micron CMOS technologies. This thesis explores circuit design techniques towards radiation tolerant power management integrated circuits, targeting applications on particle detectors and monitoring of accelerator-based experiments, aerospace and nuclear applications. It addresses advantages and caveats of commonly used radiation-hard layout techniques, which often employ Enclosed Layout or H-shaped transistors, in respect to the use of linear transistors. Radiation tolerant designs for bandgap circuits are discussed, and two different topologies were explored. A low quiescent current bandgap for sub-1 V CMOS circuits is proposed, where the use of diode-connected MOSFETs in weak-inversion is explored in order to increase its radiation tolerance. An any-load stable LDO architecture is proposed, and three versions of the design using different layout techniques were implemented and characterised. In addition, a switched DC-DC Buck converter is also studied. For reasons concerning testability and silicon area, the controller of the Buck converter is on-chip, while the inductance and the power transistors are left on-board. A prototype test chip with power management IP blocks was fabricated, using a TSMC 65 nm CMOS technology. The chip features Linear, ELT and H-shape LDO designs, bandgap circuits and a Buck DC-DC converter. We discuss the design, layout and test results of the prototype. The specifications in terms of voltage range and output current capability are based on the requirements set for the integrated on-detector electronics of the new CGEM-IT tracker for the BESIII detector. The thesis discusses the fundamental aspects of the proposed on-detector electronics and provides an in-depth depiction of the front-end design for the readout ASIC

Hybrid field generator controller for optimised perfomance

Battery charging wind turbines like, Hybrid Field Generator, have become more popular in the growing renewable energy market. With wind energy, voltage and current control is generally provided by means of power electronics. The paper describes the analytical investigation in to control aspects of a hybrid field generator controller for optimized performance. The project objective is about maintaining the generated voltage at 28V through out a generator speed range, between 149 rpm and 598 rpm. The over voltage load, known as dump load, is connected to the control circuit to reduce stress on the bypass transistor for speeds above 598 rpm. Maintaining a stable voltage through out the speed range, between 149rpm and 598rpm, is achieved by employing power electronics techniques. This is done by using power converters and inverters to vary the generator armature excitation levels hence varying its air gap flux density. All these take place during each of the three modes of generator operation, which are: buck, boost and permanent magnet modes. Although the generator controller is power electronics based, it also uses software to optimize its performance. In this case, a PIC16F877 microcontroller development system has been used to test the controller function blocks

Hybrid field generator controller for optimised perfomance

Battery charging wind turbines like, Hybrid Field Generator, have become more popular in the growing renewable energy market. With wind energy, voltage and current control is generally provided by means of power electronics. The paper describes the analytical investigation in to control aspects of a hybrid field generator controller for optimized performance. The project objective is about maintaining the generated voltage at 28V through out a generator speed range, between 149 rpm and 598 rpm. The over voltage load, known as dump load, is connected to the control circuit to reduce stress on the bypass transistor for speeds above 598 rpm. Maintaining a stable voltage through out the speed range, between 149rpm and 598rpm, is achieved by employing power electronics techniques. This is done by using power converters and inverters to vary the generator armature excitation levels hence varying its air gap flux density. All these take place during each of the three modes of generator operation, which are: buck, boost and permanent magnet modes. Although the generator controller is power electronics based, it also uses software to optimize its performance. In this case, a PIC16F877 microcontroller development system has been used to test the controller function blocks

Integrated Circuits and Systems for Smart Sensory Applications

Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware