Design and Analysis of SiGe Millimeter-Wave Radio Front-End MMICs For 5G Communication

This thesis focuses on design and realization of millimeter-wave radio frontend circuits for fifth generation(5G) wireless communication in 0.13um silicongermanium(SiGe) BiCMOS process. Radio front-end includes single-pole doublethrough (SPDT) switch, low noise amplifier (LNA) and buffer amplifier(BA) as a part of radio frequency(RF) transceiver system for E-band. The SPDT switch utilizes the reveres saturated SiGe heterojunction bipolar transistor(HBT). The resulting reverse saturated switch shows an insertion loss of 1 dB , isolation of 26 dB, reflection coefficient better than 25 dB at 75 GHz and provides a bandwidth of 40 GHz. A single to differential ended low noise amplifier(LNA)is designed using transformer balun. Simultaneous noise and impedance matching is used in order to realize both low noise and low reflection at the same time. The post layout simulation of E-band low noise amplifier exhibits a gain and noise figure(NF) of 26 dB and 5.5 dB respectively with a power consumption of 33.5 mW. The buffer amplifier shows a gain of 5.5 dB at 75 GHz. Finally, the receiver achieved a gain of 19.6 dB, noise figure(NF) of 6.9 dB and impedance matching better than 13.5 dB at 75 GHz. A 3 dB bandwidth of more than 12 GHz is achieved from the receiver. Extensive simulation results showing the performance of each circuit of receiver are presented

NEW APPROACHES TO WIDEBAND RF SWITCHING IN SILICON-GERMANIUM TECHNOLOGY

The objective of this research is to develop and investigate radio frequency (RF) switches utilizing silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) to provide a novel design approach for next-generation wideband circuits and systems. SiGe HBTs offer relatively small parasitic capacitance, making them suitable for wideband RF switching transistors with low insertion loss. Despite the available performance, the effective utilization of SiGe HBTs as RF series switches remains largely unexplored. The research presented in this dissertation introduces a novel RF series switch architecture, namely an anti-parallel (AP) SiGe HBT pair, as a potential wideband switching element for next-generation systems. The benefits of this novel RF series switch architecture are investigated, as well as insightful optimization techniques and an analysis of its operational principles. The dissertation then provides implemented design examples and develops design techniques leveraging properties possessed by the AP SiGe HBT pair.Ph.D

Radio Frequency and Millimeter Wave Circuit Component Design with SiGe BiCMOS Technology

The objective of this research is to study and leverage the unique properties and advantages of silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) integrated circuit technologies to better design radio frequency (RF) and millimeter wave (mm-wave) circuit components. With recent developments, the high yield and modest cost silicon-based semiconductor technologies have proven to be attractive and cost-effective alternatives to high-performance III-V technology platforms. Between SiGe bipolar complementary metal-oxide-semiconductor (BiCMOS) technology and advanced RF complementary metal-oxide-semiconductor (CMOS) technology, the fundamental device-level differences between SiGe HBTs and field-effect transistors (FETs) grant SiGe HBTs clear advantages as well as unique design concerns. The work presented in this dissertation identifies several advantages and challenges on design using SiGe HBTs and provides design examples that exploit and address these unique benefits and problems with circuit component designs using SiGe HBTs.Ph.D

A d-band SPDT switch utilizing reverse-saturated SiGe HBTs for dicke-radiometers

This paper presents a low insertion loss and high isolation D-band (110-170 GHz) single-pole double-throw (SPDT) switch utilizing reverse-saturated SiGe HBTs for Dicke-radiometers. The SPDT switch design is based on the quarter wave shunt switch topology and implemented with further optimizations to improve the overall insertion loss and decrease the total chip size in a commercial 0.13-mu m SiGe BiCMOS technology. Measurement results of the implemented SPDT switch show a minimum insertion loss of 2.6 dB at 125 GHz and a maximum isolation of 30 dB at 151 GHz while the measured input and output return loss is greater than 10 dB across 110-170 GHz. Total power consumption of the SPDT switch is 5.3 mW while draining 5.6 mA from a 0.95 V DC supply. Overall chip size is only 0.5 x 0.32 = 0.16 mm(2), excluding the RF and DC pads

High-frequency silicon-germanium reconfigurable circuits for radar, communication, and radiometry applications

The objective of the proposed research is to create new reconfigurable RF and millimeter-wave circuit topologies that enable significant systems benefits. The market of RF systems has long evolved under a paradigm where once a system is built, performance cannot be changed. Companies have recognized that building flexibility into RF systems and providing mechanisms to reconfigure the RF performance can enable significant benefits, including: the ability support multiple modulation schemes and standards, the reduction of product size and overdesign, the ability to adapt to environmental conditions, the improvement in spectrum utilization, and the ability to calibrate, characterize, and monitor system performance. This work demonstrates X-band LNA designs with the ability to change the frequency of operation, improve linearity, and digitally control the tradeoff between performance and power dissipation. At W-band frequencies, a novel device configuration is developed, which significantly improves state-of-the-art silicon-based switch performance. The excellent switch performance is leveraged to address major issues in current millimeter-wave systems. A front-end built-in-self-test switch topology is developed to facilitate the characterization of millimeter-wave transceivers without expensive millimeter-wave equipment. A highly integrated Dicke radiometer is also created to enable sensitive measurements of thermal noise.Ph.D

Bidirectional common-path for 8-to-24 gHz low noise SiGe BiCMOS T/R module core-chip

This thesis is based on the design of an 8-to-24 GHz low noise SiGe BiCMOS Transmitter/Receiver (T/R) Module core-chip in a small area by bidirectional common-path. The next-generation phased array systems require multi-functionality and multi-band operation to form multi-purpose integrated circuits. Wide bandwidth becomes a requirement for the system in various applications, such as electronic warfare, due to leading cheaper and lighter system solutions. Although III-V technologies can satisfy the high-frequency specifications, they are expensive and have a large area. The silicon-based technologies promise high integration capability with low cost, but they sacrifice from the performance to result in desired bandwidth. The presented dissertation targets system and circuit level solutions on the described content. The wideband core-chip utilized a bidirectional common path to surpass the bandwidth limitations. The bidirectionality enhances the bandwidth, noise, gain and area of the transceiver by the removal of the repetitive blocks in the unidirectional common chain. This approach allows succeeding desired bandwidth and compactness without sacrificing from the other high-frequency parameters. The realized core-chip has 31.5 and 32 dB midband gain for the receiver and transmitter respectively, with a + 2.1 dB /GHz of positive slope. Its RMS phase and amplitude errors are lower than 5.60 and 0.8 dB, respectively for 4-bit of resolution. The receiver noise figure is lower than 5 dB for the defined bandwidth while dissipating 112 mW of power in a 5.5 mm2 area. The presented results verify the advantage of the favored architecture and might replace the III-V based counterparts

SiGe BiCMOS front-end circuits for X-Band phased arrays

The current Transmit/Receive (T/R) modules have typically been implemented using GaAs- and InP-based discrete monolithic microwave integrated circuits (MMIC) to meet the high performance requirement of the present X-Band phased arrays. However their cost, size, weight, power consumption and complexity restrict phased array technology only to certain military and satellite applications which can tolerate these limitations. Therefore, next generation X-Band phased array radar systems aim to use low cost, silicon-based fully integrated T/R modules. For this purpose, this thesis explores the design of T/R module front-end building blocks based on new approaches and techniques which can pave the way for implementation of fully integrated X-Band phased arrays in low-cost SiGe BiCMOS process. The design of a series-shunt CMOS T/R switch with the highest IP1dB, compared to other reported works in the literature is presented. The design focuses on the techniques, primarily, to achieve higher power handling capability (IP1dB), along with higher isolation and better insertion loss of the T/R switch. Also, a new T/R switch was implemented using shunt NMOS transistors and slow-wave quarter wavelength transmission lines. It presents the utilization of slow-wave transmissions lines in T/R switches for the first time in any BiCMOS technology to the date. A fully integrated DC to 20 GHz SPDT switch based on series-shunt topology was demonstrated. The resistive body oating and on-chip impedance transformation networks (ITN) were used to improve power handling of the switch. An X-Band high performance low noise ampli er (LNA) was implemented in 0.25 μm SiGe BiCMOS process. The LNA consists of inductively degenerated two cascode stages with high speed SiGe HBT devices to achieve low noise gure (NF), high gain and good matching at the input and output, simultaneously. The performance parameters of the LNA collectively constitute the best Figure-of-Merit value reported in similar technologies, to the best of author's knowledge. Furthermore, a switched LNA was implemented SiGe BiCMOS process for the first time at X-Band. The resistive body floating technique was incorporated in switched LNA design, for the first time, to improve the linearity of the circuit further in bypass mode. Finally, a complete T/R module with a state-of-the-art performance was implemented using the individually designed blocks. The simulations results of the T/R module is presented in the dissertation. The state-of-the-art performances of the presented building blocks and the complete module are attributed to the unique design methodologies and techniques

MILLIMETER-WAVE QUADRATURE RECEIVERS FOR ATMOSPHERIC SENSING AND RADIOMETRY

The objective of this research is to investigate the design challenges of millimeter wave (mm-wave) quadrature receivers for emerging applications and develop new ideas to ad- dress these challenges. Next-generation wireless networks, satellite communications, atmospheric sensing instruments, autonomous vehicle radars, and body scanners are targeting to operate at mm-wave frequencies, and high-performance electronics are needed to enable these technologies. In this research, we investigate novel circuit topologies to improve the performance of existing mm-wave quadrature receivers, particularly for radiometry and remote sensing applications. A transformer-based front-end switch is co- designed with an LNA where the transformer acts as the input matching network of the LNA, reducing the front-end loss and system noise figure. Broadband and low-loss quadrature signal generation networks are proposed to provide highly balanced quadrature signals to reject the image frequency content. In addition, a high-efficiency frequency multiplier topology is demonstrated, achieving superior performance compared to the state-of-the-art designs. Lastly, the reliability and noise performance of on-chip noise source devices (PN junctions) in a SiGe BiCMOS platform was characterized and compared. To confirm the advantages of our ideas, the measurement and simulation results of all fabricated circuits are presented and discussed.Ph.D

Design and Reliability of mm-Wave Circuits In Silicon-Germanium

The first goal of this research is to develop a methodology for the design of RF and mm-Wave circuits in Silicon-Germanium utilizing CMOS, PIN diodes, and passive circuits. Such circuits consist of a 2-20 GHz CMOS-based TR (Transmit/Receive) SPDT switch and an 18-47 GHz Wilkinson Power Divider-Combiner (WPDC). Optimal design techniques are utilized in these circuit designs to overcome the limitations of both Front End of the Line (FEOL: active devices) and Back End of the Line (BEOL: metal stack-up) in a commercial SiGe BiCMOS processes. The resulting performances utilize novel design techniques that allow them to be competitive with existing state-of-the-art designs across multiple IC technologies. The second goal of this research is to understand the impact of DC reliability mechanisms on AC performance for analog SiGe HBT circuits and to locate an optimal DC biasing regime that balances the tradeoff between circuit reliability and performance. The circuit of interest is a DC-100 GHz wireline driver, which is widely used as a critical block in optical communications. The aim is to extend the concept of Safe Operating Area (SOA), which is the region of the DC I-V plane that does not damage a device over time, to the circuit level. This is done with the introduction of a performance-informed Circuit Safe Operating Area (C-SOA), which is defined as the region of the DC I-V plane that does not result in a degradation to AC performance over time while maintaining the best possible AC performance. The wireline driver’s highlighted AC performance is the OP1dB or output referred 1-dB compression point.M.S

W/D-Bands single-chip systems in a 0.13μm SiGe BiCMOS technology-dicke radiometer, and frequency extension module for VNAs

Recent advances in silicon-based process technologies have enabled to build low-cost and fully-integrated single-chip millimeter-wave systems with a competitive, sometimes even better, performance with respect to III-V counterparts. As a result of these developments and the increasing demand for the applications in the millimeter-wave frequency range, there is a growing research interest in the field of the design and implementation of the millimeter-wave systems in the recent years. In this thesis, we present two single-chip D-band front-end receivers for passive imaging systems and a single-chip W-band frequency extension module for VNAs, which are implemented in IHP’s 0.13μm SiGe BiCMOS technology, SG13G2, featuring HBTs with ft/fmax of 300GHz/500GHz. First, the designs, implementations, and measurement results of the sub-blocks of the radiometers, which are SPDT switch, low-noise amplifier (LNA), and power detector, are presented. Then, the implementation and experimental test results of the total power and Dicke radiometers are demonstrated. The total power radiometer has a noise equivalent temperature difference (NETD) of 0.11K, assuming an external calibration technique. In addition, the dependence of the NETD of the total power radiometer upon the gain-fluctuation is demonstrated. The NETD of the total power radiometer is 1.3K assuming a gain-fluctuation of %0.1. The front-end receiver of the total power radiometer occupies an area of 1.3 mm2. The Dicke radiometer achieves an NETD of 0.13K, for a Dicke switching of 10 kHz, and its total chip area is about 1.7 mm2. The quiescent power consumptions of the total power and Dicke radiometers are 28.5 mW and 33.8 mW, respectively. The implemented radiometers show the lowest NETD in the literature and the Dicke switching concept is employed for the first time beyond 100 GHz. Second, we present the design methodologies, implementation methods, and results of the sub-blocks of the frequency extension module, such as down-conversion mixer, frequency quadrupler, buffer amplifier, Wilkinson power divider, and dual-directional coupler. Later, the implementation, characterization and experimental test results of the single-chip frequency extension module are demonstrated. The frequency extension module has a dynamic range of about 110 dB, for an IF resolution bandwidth of 10 Hz, with an output power which varies between -4.25 dBm and -0.3 dBm over the W-band. It has an input referred 1-dB compression point of about 1.9 dBm. The directivity of the frequency extension module is better than 10 dB along the entire W-band, and its maximum value is approximately 23 dB at around 75.5 GHz. Finally, the measured s-parameters of a W-band horn-antenna, which are performed by either the designed frequency extension module and a commercial one, are compared. This study is the first demonstration of a single-chip frequency extension module in a silicon-based semiconductor technology