Experimental verification of memristor-based material implication NAND operation

Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more specific and differential logic functions is the material implication logic also named as IMPLY logic. Many papers have been published in this framework but few of them are related with experimental works using real memristor devices. In the paper authors show the verification of the IMPLY function by using $\mathrm{Ni}/\mathrm{HfO}_{2}/\mathrm{Si}$ manufactured devices and laboratory measurements. The proper behavior of the IMPLY structure (2 memristors) has been shown. The paper also verifies the proper operation of a two-steps IMPLY-based NAND gate implementation, showing the electrical behavior of the circuit in a cycling operation. A new procedure to implement a NAND gate that requires only one step is experimentally shown as well.Postprint (author's final draft

Modeling Memristive Biosensors

In the present work, a computational study is carried out investigating the relationship between the biosensing and the electrical characteristics of two-terminal Schottky- barrier silicon nanowire devices. The model suggested successfully reproduces computationally the experimentally obtained electrical behavior of the devices prior to and after the surface bio-modification. Throughout modeling and simulations, it is confirmed that the nanofabricated devices present electrical behavior fully equivalent to that of a memristor device, according to literature. Furthermore, the model introduced successfully reproduces computationally the voltage gap appearing in the current to voltage characteristics for nanowire devices with bio- modified surface. Overall, the present study confirms the implication of the memristive effect for bio sensing applications, therefore demonstrating the Memristive Biosensors

Bio-functionalization study of Memristive- Biosensors for Early Detection of Prostate Cancer

Silicon nanowires are reported for their application in bio sensing area and their potential in the detection of various biomolecules. In the present work, freestanding two-terminal Schottky-barrier silicon nanowire arrays exhibiting memristive behavior are fabricated to obtain Memristive-Biosensors. Scanning electron microscopy reveal details on the morphology of the fabricated structures. The memristive devices are functionalized with anti-free-Prostate Specific Antigen (PSA) antibody by two strategies: a) direct passive adsorption on the device surface, and b) bio-affinity approach using Biotin-Streptavidin combination. The electrical behavior of the so-obtained Memristive-Biosensors is examined dealing with the two systems of bio-functionalization. The presence of biomolecules linked to the surface of the nanostructures is detected by a voltage gap appearing in the memristive electrical characteristics. The system shows the potential for applications in molecular diagnostics especially due to possibilities for detection in the femto molar ranges that allow early detection of the cancer disease

Experimental verification of memristor-based material implication NAND operation

Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more specific and differential logic functions is the material implication logic also named as IMPLY logic. Many papers have been published in this framework but few of them are related with experimental works using real memristor devices. In the paper authors show the verification of the IMPLY function by using Ni/HfO2/Si manufactured devices and laboratory measurements. The proper behavior of the IMPLY structure (2 memristors) has been shown. The paper also verifies the proper operation of a two-step IMPLY-based NAND gate implementation, showing the electrical behavior of the circuit in a cycling operation. A new procedure to implement a NAND gate that requires only one step is experimentally shown as well

Modeling and design of memristor-based fuzzy systems

The incessant down scaling of CMOS technology has been the main driving force for the semiconductor industry over the past decades. Yet, as process variations and leakage current continue to exhibit more pronounced effect with every technology node, this down scaling paradigm is expected to saturate in the few coming years. This prospect has led the research community to seek new technologies to surpass those challenges. Amongst the promising candidates is the memristor technology recently characterized by HP Labs. The miniaturized features and the peculiar behavior exhibited by the memsitor make it very well suited in some applications. For instance, memrsitors are used as memory cells in state-of-the-art memories known as Resistive RAMs in which the non-volatility of the memristor is exploited. The programmable nature of the memristor has made it a powerful candidate in neuromorphic and fuzzy systems that, in essence, go beyond the classical Von Neumann computing paradigm. In such systems, ideas from Artificial Intelligence, that for so long have been implemented on the software level, are implemented as electronic circuitry which renders benefits such as compact area and reduced power consumption. This work focuses on memrsitor-based Fuzzy applications. First, memristor-based Min-Max circuit used in the Fuzzy Inference engine is analyzed. It is proven that memrsitor-based Min-Max circuits can be extended to an arbitrary number of inputs ‘N’ under the proper design constraints. In addition, the effect of the memristor threshold is analyzed and a closed form expression is derived. It is shown that, for a given memristor with a specific OFF resistance and threshold current, there is a trade-off between the size and the resolution of the circuit. Then, a memrsitor-based Defuzzifier circuit is proposed. A major challenge in Defuzzifiers is their area occupancy due to the use of Multiplier and Divider circuits. In this design, the memrsitor analog programmability is leveraged to reduce the multiplication operation into simple Ohm’s Law which alleviates the need for dedicated hardware for multiplier circuit and, accordingly, reduces the area occupancy

Design of a CMOS-Memristive Mixed-Signal Neuromorphic System with Energy and Area Efficiency in System Level Applications

The von Neumann architecture has been the backbone of modern computers for several years. This computational framework is popular because it defines an easy, simple and cheap design for the processing unit and memory. Unfortunately, this architecture faces a huge bottleneck going forward since complexity in computations now demands increased parallelism and this architecture is not efficient at parallel processing. Moreover, the post-Moore\u27s law era brings a constant demand for energy-efficient computing with fewer resources and less area. Hence, researchers are interested in establishing alternatives to the von Neumann architecture and neuromorphic computing is one of the few aspiring computing architectures that contributes to this research effectively. Initially, neuromorphic computing attracted attention because of the parallelism found in the bio-inspired networks and they were interested in leveraging this advantage on a single chip. Moreover, the need for speed in real time performance also escalated the popularity of neuromorphic computing and different research groups started working on hardware implementations of neural networks. Also, neuroscience is consistently building a better understanding of biological networks that provides opportunities for bridging the gap between biological neuronal activities and artificial neural networks. As a consequence, the idea behind neuromorphic computing has continued to gain in popularity. In this research, a memristive neuromorphic system for improved power and area efficiency has been presented. This particular implementation introduces a mixed-signal platform to implement neural networks in a synchronous way. In addition to mixed-signal design, a nano-scale memristive device has been introduced that provides power and area efficiency for the overall system. The system design also includes synchronous digital long term plasticity (DLTP), an online learning methodology that helps train the neural networks during the operation phase, improving the efficiency in learning when considering power consumption and area overhead. This research also proposes a stochastic neuron design with a sigmoidal firing rate. The design introduces variability in the membrane capacitance to reach different membrane potential leading to a variable stochastic firing rate