Power Quality in distribution power networks with photovoltaic energy sources

Solar radiation is characterized by short fluctuations introduced by passing clouds. These solar fluctuations will produce Voltage and power fluctuations at the PCC (Point of common coupling). Flicker level should be evaluated by using a flickermeter according to the standard IEC 61000-4-15. Models of the solar fluctuation, photovoltaic modules and power converter are shown in this paper and the flickermeter model is tested according to the IEC requirements and the CIGRE/CIRED/UIE test protocol.This research has been partially supported by the Spanish Ministry of Education and Science under contracts ENE2006- 28503 and ENE2008-06504-C02-01.Publicad

Voltage fluctuations caused by groups of wind turbines

Wind turbines connected to the distribution network can be the cause of voltage fluctuations and resulting fluctuations in the light intensity emitted by light bulbs. These fluctuations may cause people disturbance. A model has been developed to obtain a flicker prediction which is useful in the design process of a wind farm. The model is based exclusively in the frequency domain (FD). This new approach allows very fast and efficient evaluation. The impact of individual parameters is often easier to recognise and evaluate in a FD-representation. The following factors leading to flicker disturbances from a wind farm have been considered in detail: The wind spectrum: Effects of terrain and wind farm wakes on the wind turbulence spectrum have been considered and existing models have been expanded. The wind coherence: A new coherence model for large separation distances has been derived for use within a wind farm. Effects of the terrain on the coherence of power produced by turbines within a wind farm have been considered. The wind turbine: A simplified dynamic wind turbine model allows the prediction of turbine specific contributions to flicker for a variety of wind turbines using a minimal set of parameters. The flickermeter: Flicker measurements are found to sometimes neglect the impact of low frequency voltage variations. These are found to be very important for the correct flicker prediction. A new FD-flickermeter has been developed. The model has been validated against experimental data and a sensitivity analysis shows which parameters are most likely to influence the voltage flicker and which are best altered to minimise the flicker

Low Frequency Noise Modeling in Single- and Double-Gate MOSFETs

The Flicker or 1// noise dominates the noise spectrum at low frequency. A serious concern for MOSFETs for circuit application is much higher flicker (1//) noise because of the heterogeneous interface between silicon (Si) and silicon dioxide (Si02). Very high intrinsic flicker noise of CMOS transistors becomes a drawback for low-Intermediate Frequency (IF) or direct-conversion architectures. In spite of extensive research and efforts to understand the low-frequency noise origin in semiconductor devices, there exists no unique theory to explain the low-frequency noise generation mechanism. Flicker noise in MOSFETs is usually perceived to be caused by carrier density fluctuations, which is result of interaction of free carriers with oxide traps via interface states. The most widely accepted theories to explain the flicker noise generation mechanism in MOSFETs are the number fluctuation model proposed by McWhorter based on the tunneling transitions between traps in the oxide and channel carriers, and the mobility fluctuation model, which is described by Hooge\u27s empirical relation. Correlated low frequency noise models, which incorporate both the number fluctuation and correlated surface mobility fluctuation, have also been studied. This work presents a physics-based, analytical model for low-frequency or 1// noise in single- and double-gate MOSFETs. The model is an extension of a correlated low frequency noise model. The developed model takes into account the effects of quantization in the silicon channel, short channel characteristics of the device, and effective trap levels contributing to lowfrequency noise generation mechanism. The inclusion of quantum effects is based on a self-consistent solution of Poisson and Schrbdinger equations in the silicon inversion layer. For low-frequency noise calculation, both the number induced and correlated mobility-induced perturbations caused by the channel carriers\u27 interactions with the oxide states are considered. The physical parameter, effective oxide trap levels at the semiconductor-insulator interface, is modeled using the Hooge parameter and is correlated with inversion charge of the device. The model has been used to predict the low-frequency noise characteristics of a single-gate (bulk) device, a single-gate (SOI) device and a double-gate (SOI) device

Modeling of the Phase Noise in Space Communication Systems

Our work is focused on the investigation of an influence of an additive thermal noise and a multiplicative phase noise in space communication chains. The most important properties of both noise types are summarized. The main concern of this paper is on the multiplicative phase noise that is especially important in systems with the phase shift keying. The simulation procedure for modeling of a signal degraded by the multiplicative phase noise is described. One starts from the frequency domain, where noise properties are set up. Five basic phase noise types can be included. After a passing to the time domain, the final noisy signal is obtained. To prove the modeling correctness, two ways are used. Firstly, Allan variances are utilized as a time domain processing. Finally, for a comparison, the direct conversion formula from the frequency to the time domain is exploited. Created signal corrupted by the phase noise expresses the harmonic oscillator output signal. A pair of these oscillators, disturbed by different phase noise processes, is installed into a communication channel model and with its help, the simultaneous influence of both oscillators on the useful signal is examined. Results show a good coincidence with theoretical presumptions

Low-frequency noise in downscaled silicon transistors: Trends, theory and practice

By the continuing downscaling of sub-micron transistors in the range of few to one deca-nanometers, we focus on the increasing relative level of the low-frequency noise in these devices. Large amount of published data and models are reviewed and summarized, in order to capture the state-of-the-art, and to observe that the 1/area scaling of low-frequency noise holds even for carbon nanotube devices, but the noise becomes too large in order to have fully deterministic devices with area less than 10nm×10nm. The low-frequency noise models are discussed from the point of view that the noise can be both intrinsic and coupled to the charge transport in the devices, which provided a coherent picture, and more interestingly, showed that the models converge each to other, despite the many issues that one can find for the physical origin of each model. Several derivations are made to explain crossovers in noise spectra, variable random telegraph amplitudes, duality between energy and distance of charge traps, behaviors and trends for figures of merit by device downscaling, practical constraints for micropower amplifiers and dependence of phase noise on the harmonics in the oscillation signal, uncertainty and techniques of averaging by noise characterization. We have also shown how the unavoidable statistical variations by fabrication is embedded in the devices as a spatial “frozen noise”, which also follows 1/area scaling law and limits the production yield, from one side, and from other side, the “frozen noise” contributes generically to temporal 1/f noise by randomly probing the embedded variations during device operation, owing to the purely statistical accumulation of variance that follows from cause-consequence principle, and irrespectively of the actual physical process. The accumulation of variance is known as statistics of “innovation variance”, which explains the nearly log-normal distributions in the values for low-frequency noise parameters gathered from different devices, bias and other conditions, thus, the origin of geometric averaging in low-frequency noise characterizations. At present, the many models generally coincide each with other, and what makes the difference, are the values, which, however, scatter prominently in nanodevices. Perhaps, one should make some changes in the approach to the low-frequency noise in electronic devices, to emphasize the “statistics behind the numbers”, because the general physical assumptions in each model always fail at some point by the device downscaling, but irrespectively of that, the statistics works, since the low-frequency noise scales consistently with the 1/area law

Design and implementation of fully integrated low-voltage low-noise CMOS VCO.

Yip Kim-fung.Thesis (M.Phil.)--Chinese University of Hong Kong, 2002.Includes bibliographical references (leaves 95-100).Abstracts in English and Chinese.Abstract --- p.IAcknowledgement --- p.IIITable of Contents --- p.IVChapter Chapter 1 --- Introduction --- p.1Chapter 1.1 --- Motivation --- p.1Chapter 1.2 --- Objective --- p.6Chapter Chapter 2 --- Theory of Oscillators --- p.7Chapter 2.1 --- Oscillator Design --- p.7Chapter 2.1.1 --- Loop-Gain Method --- p.7Chapter 2.1.2 --- Negative Resistance-Conductance Method --- p.8Chapter 2.1.3 --- Crossed-Coupled Oscillator --- p.10Chapter Chapter 3 --- Noise Analysis --- p.15Chapter 3.1 --- Origin of Noise Sources --- p.16Chapter 3.1.1 --- Flicker Noise --- p.16Chapter 3.1.2 --- Thermal Noise --- p.17Chapter 3.1.3 --- Noise Model of Varactor --- p.18Chapter 3.1.4 --- Noise Model of Spiral Inductor --- p.19Chapter 3.2 --- Derivation of Resonator --- p.19Chapter 3.3 --- Phase Noise Model --- p.22Chapter 3.3.1 --- Leeson's Model --- p.23Chapter 3.3.2 --- Phase Noise Model defined by J. Cranincks and M Steyaert --- p.24Chapter 3.3.3 --- Non-linear Analysis of Phase Noise --- p.26Chapter 3.3.4 --- Flicker-Noise Upconversion Mechanism --- p.31Chapter 3.4 --- Phase Noise Reduction Techniques --- p.33Chapter 3.4.1 --- Conventional Tank Circuit Structure --- p.33Chapter 3.4.2 --- Enhanced Q tank circuit Structure --- p.35Chapter 3.4.3 --- Tank Circuit with parasitics --- p.37Chapter 3.4.4 --- Reduction of Up-converted Noise --- p.39Chapter Chapter 4 --- CMOS Technology and Device Modeling --- p.42Chapter 4.1 --- Device Modeling --- p.42Chapter 4.1.1 --- FET model --- p.42Chapter 4.1.2 --- Layout of Interdigitated FET --- p.46Chapter 4.1.3 --- Planar Inductor --- p.48Chapter 4.1.4 --- Circuit Model of Planar Inductor --- p.50Chapter 4.1.5 --- Inductor Layout Consideration --- p.54Chapter 4.1.6 --- CMOS RF Varactor --- p.55Chapter 4.1.7 --- Parasitics of PMOS-type varactor --- p.57Chapter Chapter 5 --- Design of Integrated CMOS VCOs --- p.59Chapter 5.1 --- 1.5GHz CMOS VCO Design --- p.59Chapter 5.1.1 --- Equivalent circuit model of differential LC VCO --- p.59Chapter 5.1.2 --- Reference Oscillator Circuit --- p.61Chapter 5.1.3 --- Proposed Oscillator Circuit --- p.62Chapter 5.1.4 --- Output buffer --- p.63Chapter 5.1.5 --- Biasing Circuitry --- p.64Chapter 5.2 --- Spiral Inductor Design --- p.65Chapter 5.3 --- Determination of W/L ratio of FET --- p.67Chapter 5.4 --- Varactor Design --- p.68Chapter 5.5 --- Layout (Cadence) --- p.69Chapter 5.6 --- Circuit Simulation (SpectreRF) --- p.74Chapter Chapter 6 --- Experimental Results and Discussion --- p.76Chapter 6.1 --- Measurement Setup --- p.76Chapter 6.2 --- Measurement results: Reference Oscillator Circuit --- p.81Chapter 6.2.1 --- Output Spectrum --- p.81Chapter 6.2.2 --- Phase Noise Performance --- p.82Chapter 6.2.3 --- Tuning Characteristic --- p.83Chapter 6.2.4 --- Microphotograph --- p.84Chapter 6.3 --- Measurement results: Proposed Oscillator Circuit --- p.85Chapter 6.3.1 --- Output Spectrum --- p.85Chapter 6.3.2 --- Phase Noise Performance --- p.86Chapter 6.3.3 --- Tuning Characteristic --- p.87Chapter 6.3.4 --- Microphotograph --- p.88Chapter 6.4 --- Comparison of Measured Results --- p.89Chapter 6.4.1 --- Phase Noise Performance --- p.89Chapter 6.4.2 --- Tuning Characteristic --- p.90Chapter Chapter 7 --- Conclusion and Future Work --- p.93Chapter 7.1 --- Conclusion --- p.93Chapter 7.2 --- Future Work --- p.94References --- p.95Author's Publication --- p.100Appendix A --- p.101Appendix B --- p.104Appendix C --- p.10