Ge-Photodetectors for Si-Based Optoelectronic Integration

High speed photodetectors are a key building block, which allow a large wavelength range of detection from 850 nm to telecommunication standards at optical fiber band passes of 1.3–1.55 μm. Such devices are key components in several applications such as local area networks, board to board, chip to chip and intrachip interconnects. Recent technological achievements in growth of high quality SiGe/Ge films on Si wafers have opened up the possibility of low cost Ge-based photodetectors for near infrared communication bands and high resolution spectral imaging with high quantum efficiencies. In this review article, the recent progress in the development and integration of Ge-photodetectors on Si-based photonics will be comprehensively reviewed, along with remaining technological issues to be overcome and future research trends

High-Responsivity Graphene-Boron Nitride Photodetector and Autocorrelator in a Silicon Photonic Integrated Circuit

Graphene and other two-dimensional (2D) materials have emerged as promising materials for broadband and ultrafast photodetection and optical modulation. These optoelectronic capabilities can augment complementary metal-oxide-semiconductor (CMOS) devices for high-speed and low-power optical interconnects. Here, we demonstrate an on-chip ultrafast photodetector based on a two-dimensional heterostructure consisting of high-quality graphene encapsulated in hexagonal boron nitride. Coupled to the optical mode of a silicon waveguide, this 2D heterostructure-based photodetector exhibits a maximum responsivity of 0.36 A/W and high-speed operation with a 3 dB cut-off at 42 GHz. From photocurrent measurements as a function of the top-gate and source-drain voltages, we conclude that the photoresponse is consistent with hot electron mediated effects. At moderate peak powers above 50 mW, we observe a saturating photocurrent consistent with the mechanisms of electron-phonon supercollision cooling. This nonlinear photoresponse enables optical on-chip autocorrelation measurements with picosecond-scale timing resolution and exceptionally low peak powers

Graphene as a buffer layer for silicon carbide-on-insulator structures

We report an innovative technique for growing the silicon carbide-on-insulator (SiCOI) structure by utilizing polycrystalline single layer graphene (SLG) as a buffer layer. The epitaxial growth was carried out using a hot-mesh chemical vapor deposition (HM-CVD) technique. Cubic SiC (3C-SiC) thin film in (111) domain was realized at relatively low substrate temperature of 750 °C. 3C-SiC energy bandgap of 2.2 eV was confirmed. The Si-O absorption band observed in the grown film can be caused by the out-diffusion of the oxygen atom from SiO2 substrate or oxygen doping during the cleaning process. Further experimental works by optimizing the cleaning process, growth parameters of the present growth method, or by using other growth methods, as well, are expected to realize a high quality SiCOI structure, thereby opening up the way for a breakthrough in the development of advanced ULSIs with multifunctionalities

A 1-D heterodyne lens-free optical phased array camera with reference phase shifting

This paper presents the first integrated silicon photonics optical phased array (OPA) receiver with imaging capabilities. A 32-element 1D OPA with an overall aperture size of 96x50 μm^2 is used to generate an electrically steerable “gazing beam”. The OPA receiver elements couple the incident light to on-chip waveguides which is processed as a phased array receiver. To minimize signal loss and enhance sensitivity, a heterodyne architecture with phase shifters in the local reference path is utilized. The OPA receiver can provide fully programmable angular selectivity with a grating-lobe-free field-of-view of 30° and a gazing beamwidth of 0.74°

Multi-level analysis of on-chip optical wireless links

Networks-on-chip are being regarded as a promising solution to meet the on-going requirement for higher and higher computation capacity. In view of future kilo-cores architectures, electrical wired connections are likely to become inefficient and alternative technologies are being widely investigated. Wireless communications on chip may be therefore leveraged to overcome the bottleneck of physical interconnections. This work deals with wireless networks-on-chip at optical frequencies, which can simplify the network layout and reduce the communication latency, easing the antenna on-chip integration process at the same time. On the other end, optical wireless communication on-chip can be limited by the heavy propagation losses and the possible cross-link interference. Assessment of the optical wireless network in terms of bit error probability and maximum communication range is here investigated through a multi-level approach. Manifold aspects, concurring to the final system performance, are simultaneously taken into account, like the antenna radiation properties, the data-rate of the core-to core communication, the geometrical and electromagnetic layout of the chip and the noise and interference level. Simulations results suggest that communication up to some hundreds of μm can be pursued provided that the antenna design and/or the target data-rate are carefully tailored to the actual layout of the chip

Multi-level analysis of on-chip optical wireless links

Networks-on-chip are being regarded as a promising solution to meet the on-going requirement for higher and higher computation capacity. In view of future kilo-cores architectures, electrical wired connections are likely to become inefficient and alternative technologies are being widely investigated. Wireless communications on chip may be therefore leveraged to overcome the bottleneck of physical interconnections. This work deals with wireless networks-on-chip at optical frequencies, which can simplify the network layout and reduce the communication latency, easing the antenna on-chip integration process at the same time. On the other end, optical wireless communication on-chip can be limited by the heavy propagation losses and the possible cross-link interference. Assessment of the optical wireless network in terms of bit error probability and maximum communication range is here investigated through a multi-level approach. Manifold aspects, concurring to the final system performance, are simultaneously taken into account, like the antenna radiation properties, the data-rate of the core-to core communication, the geometrical and electromagnetic layout of the chip and the noise and interference level. Simulations results suggest that communication up to some hundreds of \u3bcm can be pursued provided that the antenna design and/or the target data-rate are carefully tailored to the actual layout of the chip

Recent Advances in Silicon Photodetectors Based on the Internal Photoemission Effect

Silicon technologies provide an excellent platform in order to realize microsystems where photonic and microelectronic functionalities are monolithically integrated on the same substrate. In recent years, a lot of passive and active silicon photonic devices have been optimized to work at telecom wavelengths where, unfortunately, silicon has a neglectable optical absorption due to its bandgap of 1.12 eV. Although silicon cannot detect wavelengths above 1.1 μm, in recent years, tremendous advances have been made in order to make it suitable for operation in the near-infrared spectrum. One of the approaches is to take advantage of the internal photoemission effect through a Schottky junction where a metal absorbs the incoming radiation and emits hot carriers into silicon making sub-bandgap detection possible. The present chapter describes the more recent advances in the field of the silicon photodetectors based on the internal photoemission effect showing as devices based on new emerging materials and complex nanostructure are leading this family of device to compare favorably with the well-established technologies commonly used for telecom wavelengths based on germanium and III–V semiconductors