1,937 research outputs found

    Neuro-memristive Circuits for Edge Computing: A review

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    The volume, veracity, variability, and velocity of data produced from the ever-increasing network of sensors connected to Internet pose challenges for power management, scalability, and sustainability of cloud computing infrastructure. Increasing the data processing capability of edge computing devices at lower power requirements can reduce several overheads for cloud computing solutions. This paper provides the review of neuromorphic CMOS-memristive architectures that can be integrated into edge computing devices. We discuss why the neuromorphic architectures are useful for edge devices and show the advantages, drawbacks and open problems in the field of neuro-memristive circuits for edge computing

    Memristor-Based Resistive Random Access Memory: Hybrid Architecture for Low Power Compact Memory Design

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    The computer memory system has both volatile and non volatile memory. The Volatile memories such as SRAM and DRAM used as a main memory and non volatile memory like flash memory. But in recent days new non volatile technologies are invented that promise the rapid changes in the landscape of memory systems. Memristor is a two terminal passive element whose resistance depends on the magnitude and polarity of the voltage applied to it. It has nonlinear relationship between voltages and current which is similar to memory devices. In this paper we approach to design memristor based nonvolatile 6-T static random access memory (SRAM) and analysis the circuit performance with conventional 6-T SRAM cell in order to prove the parameter optimizations. Then we address the memristor-based resistive random access memory (MRRAM) which is similar to that of static random access memory (SRAM) cell and we compare the nonvolatile characteristics of MRRAM with SRAM cell. Index terms: NV memory, memristor, SRAM, Resistive RAM, SPICE model

    CREDIT CARD WITH DYNAMIC CREDIT RATING DISPLAY

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    The present disclosure relates to a method, system and payment card for dynamically displaying credit rating. As such, credit related information and transaction information of a cardholder associated with a payment card is received from an issuer server. The credit related information and transaction information of the cardholder are used for predicting one or more behavioural parameters associated with the cardholder. Further, the one or more values are used for determining a credit rating of the cardholder. The credit rating of the cardholder may be displayed on the payment card or cardholder device or on any merchant device facilitating transaction for the cardholder

    Challenges and Opportunities in Implementing Negative Differential Resistance Mode Reconfigurable Field Effect Transistors

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    Desirably, the world relies on the devices being compact, as they could drive to the increased functionality of integrated circuits at the provided footstep, that is becoming more reliable. To reduce the scalability over the devices, approach has been outlined utilizing the NDR mode reconfigurable functionality over the transistors. Being an individual device efficient in exhibiting different task with the different configurations in the same physical circuitry. On the view of reconfigurable transistors, possibly authorize the reconfiguration from a p-type to n-type channel transistor has been expelled as an emerging application such as static memory cells, fast switching logic circuits as well as energy efficient computational multi valued logic. This article emphasizes NDR mode RFET along with its classification, followed by enhancing the RFET technology concepts and RFETs future potential has been discussed briefing with the growing applications like hardware security as well as neuro-inspired computing.Comment: 28 pages, 9 figure

    Low-power emerging memristive designs towards secure hardware systems for applications in internet of things

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    Emerging memristive devices offer enormous advantages for applications such as non-volatile memories and in-memory computing (IMC), but there is a rising interest in using memristive technologies for security applications in the era of internet of things (IoT). In this review article, for achieving secure hardware systems in IoT, low-power design techniques based on emerging memristive technology for hardware security primitives/systems are presented. By reviewing the state-of-the-art in three highlighted memristive application areas, i.e. memristive non-volatile memory, memristive reconfigurable logic computing and memristive artificial intelligent computing, their application-level impacts on the novel implementations of secret key generation, crypto functions and machine learning attacks are explored, respectively. For the low-power security applications in IoT, it is essential to understand how to best realize cryptographic circuitry using memristive circuitries, and to assess the implications of memristive crypto implementations on security and to develop novel computing paradigms that will enhance their security. This review article aims to help researchers to explore security solutions, to analyze new possible threats and to develop corresponding protections for the secure hardware systems based on low-cost memristive circuit designs

    The NASA SBIR product catalog

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    The purpose of this catalog is to assist small business firms in making the community aware of products emerging from their efforts in the Small Business Innovation Research (SBIR) program. It contains descriptions of some products that have advanced into Phase 3 and others that are identified as prospective products. Both lists of products in this catalog are based on information supplied by NASA SBIR contractors in responding to an invitation to be represented in this document. Generally, all products suggested by the small firms were included in order to meet the goals of information exchange for SBIR results. Of the 444 SBIR contractors NASA queried, 137 provided information on 219 products. The catalog presents the product information in the technology areas listed in the table of contents. Within each area, the products are listed in alphabetical order by product name and are given identifying numbers. Also included is an alphabetical listing of the companies that have products described. This listing cross-references the product list and provides information on the business activity of each firm. In addition, there are three indexes: one a list of firms by states, one that lists the products according to NASA Centers that managed the SBIR projects, and one that lists the products by the relevant Technical Topics utilized in NASA's annual program solicitation under which each SBIR project was selected
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