16 research outputs found
On the possibilities of FSM description of parallel composition of timed finite state machines
ΠΠΎΠ½Π΅ΡΠ½ΡΠ΅ Π°Π²ΡΠΎΠΌΠ°ΡΡ ΡΠΈΡΠΎΠΊΠΎ ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΡΡΡΡ Π΄Π»Ρ Π°Π½Π°Π»ΠΈΠ·Π° ΠΈ ΡΠΈΠ½ΡΠ΅Π·Π° Π΄ΠΈΡΠΊΡΠ΅ΡΠ½ΡΡ
ΡΠΈΡΡΠ΅ΠΌ. ΠΡΠΈ ΠΎΠΏΠΈΡΠ°Π½ΠΈΠΈ ΡΠΈΡΡΠ΅ΠΌ, ΠΏΠΎΠ²Π΅Π΄Π΅Π½ΠΈΠ΅ ΠΊΠΎΡΠΎΡΡΡ
Π·Π°Π²ΠΈΡΠΈΡ ΠΎΡ Π²ΡΠ΅ΠΌΠ΅Π½ΠΈ, ΠΊΠΎΠ½Π΅ΡΠ½ΡΠΉ Π°Π²ΡΠΎΠΌΠ°Ρ ΡΠ°ΡΡΠΈΡΡΠ΅ΡΡΡ Π²Π²Π΅Π΄Π΅Π½ΠΈΠ΅ΠΌ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΡΡ
Π°ΡΠΏΠ΅ΠΊΡΠΎΠ² ΠΈ Π²Π²ΠΎΠ΄ΠΈΡΡΡ ΠΏΠΎΠ½ΡΡΠΈΠ΅ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΠΎΠ³ΠΎ Π°Π²ΡΠΎΠΌΠ°ΡΠ°. Π Π½Π°ΡΡΠΎΡΡΠ΅ΠΉ ΡΡΠ°ΡΡΠ΅ ΡΠ°ΡΡΠΌΠ°ΡΡΠΈΠ²Π°Π΅ΡΡΡ ΠΏΡΠΎΠ±Π»Π΅ΠΌΠ° ΠΏΠΎΡΡΡΠΎΠ΅Π½ΠΈΡ ΠΏΠ°ΡΠ°Π»Π»Π΅Π»ΡΠ½ΠΎΠΉ ΠΊΠΎΠΌΠΏΠΎΠ·ΠΈΡΠΈΠΈ Π΄Π»Ρ Π΄Π²ΡΡ
ΠΌΠΎΠ΄Π΅Π»Π΅ΠΉ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΡΡ
Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ², Π° ΠΈΠΌΠ΅Π½Π½ΠΎ, Π΄Π»Ρ Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ² Ρ ΡΠ°ΠΉΠΌΠ°ΡΡΠ°ΠΌΠΈ ΠΈ Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ² Ρ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΡΠΌΠΈ ΠΎΠ³ΡΠ°Π½ΠΈΡΠ΅Π½ΠΈΡΠΌΠΈ. ΠΠ²Π΅ ΡΡΠΈ ΡΠΎΡΠΌΡ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΡΡ
Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ² Π½Π΅ ΡΠ²Π»ΡΡΡΡΡ Π²Π·Π°ΠΈΠΌΠΎΠ·Π°ΠΌΠ΅Π½ΡΠ΅ΠΌΡΠΌΠΈ ΠΈ ΡΠ²Π»ΡΡΡΡΡ Π±ΠΎΠ»Π΅Π΅ ΡΠ°ΡΡΠ½ΡΠΌΠΈ ΡΠ»ΡΡΠ°ΡΠΌΠΈ ΠΎΠ±ΡΠ΅ΠΉ ΠΌΠΎΠ΄Π΅Π»ΠΈ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΠΎΠ³ΠΎ Π°Π²ΡΠΎΠΌΠ°ΡΠ°, ΡΠΎΠ΄Π΅ΡΠΆΠ°ΡΠ΅Π³ΠΎ ΠΊΠ°ΠΊ ΡΠ°ΠΉΠΌΠ°ΡΡΡ, ΡΠ°ΠΊ ΠΈ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΡΠ΅ ΠΎΠ³ΡΠ°Π½ΠΈΡΠ΅Π½ΠΈΡ. ΠΡ ΡΠ°ΠΊΠΆΠ΅ ΡΡΠΈΡΠ°Π΅ΠΌ, ΡΡΠΎ Π²ΡΠ΅ Π²ΡΡΠ΅ ΡΠΏΠΎΠΌΡΠ½ΡΡΡΠ΅ ΠΌΠΎΠ΄Π΅Π»ΠΈ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΡΡ
Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ² ΠΈΠΌΠ΅ΡΡ ΡΠ΅Π»ΠΎΡΠΈΡΠ»Π΅Π½Π½ΡΠ΅ Π²ΡΡ
ΠΎΠ΄Π½ΡΠ΅ Π·Π°Π΄Π΅ΡΠΆΠΊΠΈ (Π²ΡΡ
ΠΎΠ΄Π½ΡΠ΅ ΡΠ°ΠΉΠΌΠ°ΡΡΡ). ΠΠ²ΡΠΎΠΌΠ°ΡΡ-ΠΊΠΎΠΌΠΏΠΎΠ½Π΅Π½ΡΡ ΡΠ°Π±ΠΎΡΠ°ΡΡ Π² ΡΠ΅ΠΆΠΈΠΌΠ΅ Π΄ΠΈΠ°Π»ΠΎΠ³Π°, ΠΏΠΎ Π·Π°Π²Π΅ΡΡΠ΅Π½ΠΈΠΈ ΠΊΠΎΡΠΎΡΠΎΠ³ΠΎ ΠΊΠΎΠΌΠΏΠΎΠ·ΠΈΡΠΈΡ Π²ΡΠ΄Π°ΡΡ Π²Π½Π΅ΡΠ½ΠΈΠΉ Π²ΡΡ
ΠΎΠ΄Π½ΠΎΠΉ ΡΠΈΠΌΠ²ΠΎΠ». ΠΡΠΈ ΡΠ΅ΡΠ΅Π½ΠΈΠΈ Π·Π°Π΄Π°Ρ Π°Π½Π°Π»ΠΈΠ·Π° Π΄Π»Ρ ΡΠΈΡΡΠ΅ΠΌΡ Π²Π·Π°ΠΈΠΌΠΎΠ΄Π΅ΠΉΡΡΠ²ΡΡΡΠΈΡ
ΠΊΠΎΠ½Π΅ΡΠ½ΡΡ
Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ² Ρ ΠΈΡΠΏΠΎΠ»ΡΠ·ΠΎΠ²Π°Π½ΠΈΠ΅ΠΌ ΠΊΠ»Π°ΡΡΠΈΡΠ΅ΡΠΊΠΈΡ
ΠΌΠ΅ΡΠΎΠ΄ΠΎΠ² ΡΠ°ΠΊΠ°Ρ ΠΊΠΎΠΌΠΏΠΎΠ·ΠΈΡΠΈΡ ΠΎΠ±ΡΡΠ½ΠΎ ΠΎΠΏΠΈΡΡΠ²Π°Π΅ΡΡΡ Π΅Π΄ΠΈΠ½ΡΡΠ²Π΅Π½Π½ΡΠΌ Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠΌ. Π ΡΠ°Π±ΠΎΡΠ΅ ΠΏΠΎΠΊΠ°Π·ΡΠ²Π°Π΅ΡΡΡ, ΡΡΠΎ Π² ΠΎΠ±ΡΠ΅ΠΌ ΡΠ»ΡΡΠ°Π΅, Π² ΠΎΡΠ»ΠΈΡΠΈΠ΅ ΠΎΡ ΡΠ»ΡΡΠ°Ρ ΠΊΠ»Π°ΡΡΠΈΡΠ΅ΡΠΊΠΈΡ
ΠΊΠΎΠ½Π΅ΡΠ½ΡΡ
Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ², Π½Π°Π»ΠΈΡΠΈΡ Β«ΠΌΠ΅Π΄Π»Π΅Π½Π½ΠΎΠΉ Π²Π½Π΅ΡΠ½Π΅ΠΉ ΡΡΠ΅Π΄ΡΒ» ΠΈ ΠΎΡΡΡΡΡΡΠ²ΠΈΡ ΠΎΡΡΠΈΠ»Π»ΡΡΠΈΠΉ Π½Π΅Π΄ΠΎΡΡΠ°ΡΠΎΡΠ½ΠΎ Π΄Π»Ρ ΠΎΠΏΠΈΡΠ°Π½ΠΈΡ ΠΏΠΎΠ²Π΅Π΄Π΅Π½ΠΈΡ ΠΊΠΎΠΌΠΏΠΎΠ·ΠΈΡΠΈΠΈ Π΄Π΅ΡΠ΅ΡΠΌΠΈΠ½ΠΈΡΠΎΠ²Π°Π½Π½ΡΠΌ Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠΌ Ρ ΠΎΠ΄Π½ΠΎΠΉ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΠΎΠΉ ΠΏΠ΅ΡΠ΅ΠΌΠ΅Π½Π½ΠΎΠΉ, Π΅ΡΠ»ΠΈ Π²Ρ
ΠΎΠ΄Π½ΡΠ΅ ΡΠΈΠΌΠ²ΠΎΠ»Ρ ΠΌΠΎΠ³ΡΡ ΠΏΠΎΡΡΡΠΏΠ°ΡΡ Π½Π΅ ΡΠΎΠ»ΡΠΊΠΎ Π² ΡΠ΅Π»ΠΎΡΠΈΡΠ»Π΅Π½Π½ΡΠ΅, Π½ΠΎ ΠΈ ΡΠ°ΡΠΈΠΎΠ½Π°Π»ΡΠ½ΡΠ΅ ΠΌΠΎΠΌΠ΅Π½ΡΡ Π²ΡΠ΅ΠΌΠ΅Π½ΠΈ. Π’Π΅ΠΌ Π½Π΅ ΠΌΠ΅Π½Π΅Π΅, ΠΎΠΏΡΠ΅Π΄Π΅Π»ΡΠ΅ΡΡΡ ΠΊΠ»Π°ΡΡ ΡΠΈΡΡΠ΅ΠΌ, Π² ΠΊΠΎΡΠΎΡΡΡ
ΠΊΠ°ΠΆΠ΄ΠΎΠ΅ Π²Π½Π΅ΡΠ½Π΅Π΅ Π²Ρ
ΠΎΠ΄Π½ΠΎΠ΅ Π²ΠΎΠ·Π΄Π΅ΠΉΡΡΠ²ΠΈΠ΅ ΠΈΠ½ΠΈΡΠΈΠΈΡΡΠ΅Ρ Π΄ΠΈΠ°Π»ΠΎΠ³ ΠΌΠ΅ΠΆΠ΄Ρ ΠΊΠΎΠΌΠΏΠΎΠ½Π΅Π½ΡΠ°ΠΌΠΈ, ΡΡΠΎ ΠΏΠΎΠ·Π²ΠΎΠ»ΡΠ΅Ρ ΠΎΠΏΠΈΡΠ°ΡΡ ΠΏΠΎΠ²Π΅Π΄Π΅Π½ΠΈΠ΅ ΡΠ°ΠΊΠΎΠΉ ΠΊΠΎΠΌΠΏΠΎΠ·ΠΈΡΠΈΠΈ Π΄Π΅ΡΠ΅ΡΠΌΠΈΠ½ΠΈΡΠΎΠ²Π°Π½Π½ΡΠΌ Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠΌ Ρ ΠΎΠ΄Π½ΠΎΠΉ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΠΎΠΉ ΠΏΠ΅ΡΠ΅ΠΌΠ΅Π½Π½ΠΎΠΉ. Π ΡΠ°ΡΡΠ½ΠΎΡΡΠΈ, ΡΠ°ΡΡΠΌΠ°ΡΡΠΈΠ²Π°Π΅ΡΡΡ ΠΏΠΎΡΠ»Π΅Π΄ΠΎΠ²Π°ΡΠ΅Π»ΡΠ½Π°Ρ ΠΊΠΎΠΌΠΏΠΎΠ·ΠΈΡΠΈΡ Π²ΡΠ΅ΠΌΠ΅Π½Π½ΡΡ
Π°Π²ΡΠΎΠΌΠ°ΡΠΎΠ², ΠΊΠΎΡΠΎΡΠ°Ρ ΡΠ΄ΠΎΠ²Π»Π΅ΡΠ²ΠΎΡΡΠ΅Ρ ΡΠ°ΠΊΠΎΠΌΡ ΠΎΠ³ΡΠ°Π½ΠΈΡΠ΅Π½ΠΈΡ. ΠΡΡΠ³ΠΎΠ΅ ΠΎΠ³ΡΠ°Π½ΠΈΡΠ΅Π½ΠΈΠ΅ ΠΏΡΠΎΠ΄ΠΈΠΊΡΠΎΠ²Π°Π½ΠΎ Π½Π°Π»ΠΈΡΠΈΠ΅ΠΌ ΡΠ°ΠΉΠΌΠ°ΡΡΠΎΠ², Π·Π½Π°ΡΠ΅Π½ΠΈΠ΅ ΠΊΠΎΡΠΎΡΠΎΠ³ΠΎ Π² ΠΊΠ°ΠΆΠ΄ΠΎΠΌ ΠΈΠ· ΡΠΎΡΡΠΎΡΠ½ΠΈΠΉ Π΄ΠΎΠ»ΠΆΠ½ΠΎ ΠΏΡΠ΅Π²ΡΡΠ°ΡΡ Π²Π΅Π»ΠΈΡΠΈΠ½Ρ Π²ΡΡ
ΠΎΠ΄Π½ΠΎΠΉ Π·Π°Π΄Π΅ΡΠΆΠΊΠΈ ΠΏΡΠΈ ΠΎΠ±ΡΠ°Π±ΠΎΡΠΊΠ΅ Π»ΡΠ±ΠΎΠ³ΠΎ ΠΏΠ΅ΡΠ΅Ρ
ΠΎΠ΄Π° Π² ΡΡΠΎΠΌ ΡΠΎΡΡΠΎΡΠ½ΠΈΠΈ
Bounded Determinization of Timed Automata with Silent Transitions
Deterministic timed automata are strictly less expressive than their
non-deterministic counterparts, which are again less expressive than those with
silent transitions. As a consequence, timed automata are in general
non-determinizable. This is unfortunate since deterministic automata play a
major role in model-based testing, observability and implementability. However,
by bounding the length of the traces in the automaton, effective
determinization becomes possible. We propose a novel procedure for bounded
determinization of timed automata. The procedure unfolds the automata to
bounded trees, removes all silent transitions and determinizes via disjunction
of guards. The proposed algorithms are optimized to the bounded setting and
thus are more efficient and can handle a larger class of timed automata than
the general algorithms. The approach is implemented in a prototype tool and
evaluated on several examples. To our best knowledge, this is the first
implementation of this type of procedure for timed automata.Comment: 25 page
Reducing Clocks in Timed Automata while Preserving Bisimulation
Model checking timed automata becomes increasingly complex with the increase
in the number of clocks. Hence it is desirable that one constructs an automaton
with the minimum number of clocks possible. The problem of checking whether
there exists a timed automaton with a smaller number of clocks such that the
timed language accepted by the original automaton is preserved is known to be
undecidable. In this paper, we give a construction, which for any given timed
automaton produces a timed bisimilar automaton with the least number of clocks.
Further, we show that such an automaton with the minimum possible number of
clocks can be constructed in time that is doubly exponential in the number of
clocks of the original automaton.Comment: 28 pages including reference, 8 figures, full version of paper
accepted in CONCUR 201
Compositional schedulability analysis of real-time actor-based systems
We present an extension of the actor model with real-time, including deadlines associated with messages, and explicit application-level scheduling policies, e.g.,"earliest deadline first" which can be associated with individual actors. Schedulability analysis in this setting amounts to checking whether, given a scheduling policy for each actor, every task is processed within its designated deadline. To check schedulability, we introduce a compositional automata-theoretic approach, based on maximal use of model checking combined with testing. Behavioral interfaces define what an actor expects from the environment, and the deadlines for messages given these assumptions. We use model checking to verify that actors match their behavioral interfaces. We extend timed automata refinement with the notion of deadlines and use it to define compatibility of actor environments with the behavioral interfaces. Model checking of compatibility is computationally hard, so we propose a special testing process. We show that the analyses are decidable and automate the process using the Uppaal model checke
Determinisability of register and timed automata
The deterministic membership problem for timed automata asks whether the
timed language given by a nondeterministic timed automaton can be recognised by
a deterministic timed automaton. An analogous problem can be stated in the
setting of register automata. We draw the complete decidability/complexity
landscape of the deterministic membership problem, in the setting of both
register and timed automata. For register automata, we prove that the
deterministic membership problem is decidable when the input automaton is a
nondeterministic one-register automaton (possibly with epsilon transitions) and
the number of registers of the output deterministic register automaton is
fixed. This is optimal: We show that in all the other cases the problem is
undecidable, i.e., when either 1) the input nondeterministic automaton has two
registers or more (even without epsilon transitions), or 2) it uses guessing,
or 3) the number of registers of the output deterministic automaton is not
fixed. The landscape for timed automata follows a similar pattern. We show that
the problem is decidable when the input automaton is a one-clock
nondeterministic timed automaton without epsilon transitions and the number of
clocks of the output deterministic timed automaton is fixed. Again, this is
optimal: We show that the problem in all the other cases is undecidable, i.e.,
when either 1) the input nondeterministic timed automaton has two clocks or
more, or 2) it uses epsilon transitions, or 3) the number of clocks of the
output deterministic automaton is not fixed.Comment: journal version of a CONCUR'20 paper. arXiv admin note: substantial
text overlap with arXiv:2007.0934
Utilization of timed automata as a verification tool for real-time security protocols
Thesis (Master)--Izmir Institute of Technology, Computer Engineering, Izmir, 2010Includes bibliographical references (leaves: 85-92)Text in English; Abstract: Turkish and Englishxi, 92 leavesTimed Automata is an extension to the automata-theoretic approach to the modeling of real time systems that introduces time into the classical automata. Since it has been first proposed by Alur and Dill in the early nineties, it has become an important research area and been widely studied in both the context of formal languages and modeling and verification of real time systems. Timed automata use dense time modeling, allowing efficient model checking of time-sensitive systems whose correct functioning depend on the timing properties. One of these application areas is the verification of security protocols. This thesis aims to study the timed automata model and utilize it as a verification tool for security protocols. As a case study, the Neuman-Stubblebine Repeated Authentication Protocol is modeled and verified employing the time-sensitive properties in the model. The flaws of the protocol are analyzed and it is commented on the benefits and challenges of the model