Photonic packaging: transforming silicon photonic integrated circuits into photonic devices

Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved

Development of an image converter of radical design

A long term investigation of thin film sensors, monolithic photo-field effect transistors, and epitaxially diffused phototransistors and photodiodes to meet requirements to produce acceptable all solid state, electronically scanned imaging system, led to the production of an advanced engineering model camera which employs a 200,000 element phototransistor array (organized in a matrix of 400 rows by 500 columns) to secure resolution comparable to commercial television. The full investigation is described for the period July 1962 through July 1972, and covers the following broad topics in detail: (1) sensor monoliths; (2) fabrication technology; (3) functional theory; (4) system methodology; and (5) deployment profile. A summary of the work and conclusions are given, along with extensive schematic diagrams of the final solid state imaging system product

Optoelectronic devices and packaging for information photonics

This thesis studies optoelectronic devices and the integration of these components onto optoelectronic multi chip modules (OE-MCMs) using a combination of packaging techniques. For this project, (1×12) array photodetectors were developed using PIN diodes with a GaAs/AlGaAs strained layer structure. The devices had a pitch of 250μm, operated at a wavelength of 850nm. Optical characterisation experiments of two types of detector arrays (shoe and ring) were successfully performed. Overall, the shoe devices achieved more consistent results in comparison with ring diodes, i.e. lower dark current and series resistance values. A decision was made to choose the shoe design for implementation into the high speed systems demonstrator. The (1x12) VCSEL array devices were the optical sources used in my research. This was an identical array at 250μm pitch configuration used in order to match the photodetector array. These devices had a wavelength of 850nm. Optoelectronic testing of the VCSEL was successfully conducted, which provided good beam profile analysis and I-V-P measurements of the VCSEL array. This was then implemented into a simple demonstrator system, where eye diagrams examined the systems performance and characteristics of the full system and showed positive results. An explanation was given of the following optoelectronic bonding techniques: Wire bonding and flip chip bonding with its associated technologies, i.e. Solder, gold stud bump and ACF. Also, technologies, such as ultrasonic flip chip bonding and gold micro-post technology were looked into and discussed. Experimental work implementing these methods on packaging the optoelectronic devices was successfully conducted and described in detail. Packaging of the optoelectronic devices onto the OEMCM was successfully performed. Electrical tests were successfully carried out on the flip chip bonded VCSEL and Photodetector arrays. These results verified that the devices attached on the MCM achieved good electrical performance and reliable bonding. Finally, preliminary testing was conducted on the fully assembled OE-MCMs. The aim was to initially power up the mixed signal chip (VCSEL driver), and then observe the VCSEL output

Conceptual Design of the Modular Detector and Readout System for the CMB-S4 survey experiment

We present the conceptual design of the modular detector and readout system for the Cosmic Microwave Background Stage 4 (CMB-S4) ground-based survey experiment. CMB-S4 will map the cosmic microwave background (CMB) and the millimeter-wave sky to unprecedented sensitivity, using 500,000 superconducting detectors observing from Chile and Antarctica to map over 60 percent of the sky. The fundamental building block of the detector and readout system is a detector module package operated at 100 mK, which is connected to a readout and amplification chain that carries signals out to room temperature. It uses arrays of feedhorn-coupled orthomode transducers (OMT) that collect optical power from the sky onto dc-voltage-biased transition-edge sensor (TES) bolometers. The resulting current signal in the TESs is then amplified by a two-stage cryogenic Superconducting Quantum Interference Device (SQUID) system with a time-division multiplexer to reduce wire count, and matching room-temperature electronics to condition and transmit signals to the data acquisition system. Sensitivity and systematics requirements are being developed for the detector and readout system over a wide range of observing bands (20 to 300 GHz) and optical powers to accomplish CMB-S4's science goals. While the design incorporates the successes of previous generations of CMB instruments, CMB-S4 requires an order of magnitude more detectors than any prior experiment. This requires fabrication of complex superconducting circuits on over 10 square meters of silicon, as well as significant amounts of precision wiring, assembly and cryogenic testing.Comment: 25 pages, 15 figures, presented at and published in the proceedings of SPIE Astronomical Telescopes and Instrumentation 202

Encapsulamento de circuitos ópticos integrados

Mestrado em Engenharia Eletrónica e TelecomunicaçõesWith the continuous evolution of optical communication systems, emerged a need for high-performance optoelectronic elements at lower costs. Photonic packaging plays a key role for the next-generation of optical devices. In this work a standard packaging design rules is described, covering both the electrical and optical-packaging exploring both active and passive adjusting techniques, as well as the thermal management of the photonic integrated circuit (PIC). First a process for fiber-to-chip coupling with custom made ball-lensed fibers, is performed and tested initially in a testing-chip and thereafter in a manufactured practical study-case composed by a silicon holder with an InP distributed feedback (DFB) laser. The process of manufacturing etched V-grooves for fiber alignment is approached in detail. After this, for electrical interconnects and radio frequency (RF) packaging, both wire-bonding and flip-chip technique are discussed, and a characterization of the s-parameters in a PIC with wire-bonding is presented. A technique based on ruthenium-based sensors and platinum and titanium-based sensors for thermal control of the PIC is studied and the tested using a custom made PCB designed exclusively for that purpose.Com a constante evolução dos sistemas de comunicação óticos veio a necessidade de componentes optoelectrónicos de elevada performance a custos relativamente baixos. O encapsulamento ótico tem um papel chave nos dispositivos óticos de última geração. Neste trabalho são descritas as regras de um processo de encapsulamento padrão, que abrange tanto o encapsulamento elétrico e ótico onde são exploradas técnicas de ajustamento ativas e passivas bem como o controlo térmico do circuito ótico integrado (PIC). No início foi efetuado um processo de acoplamento da fibra ao chip com fibras de lente esférica personalizadas, numa primeira usando um chip de teste e de seguida num caso de estudo prático que consiste numa estrutura composta por um holder de silício com um laser de realimentação distribuída (DFB). É abordado em detalhe o processo de fabricação de V-grooves para o alinhamento da fibra com o chip. De seguida são apresentadas e discutidas as técnicas de wire-bonding e flip-chip para o encapsulamento elétrico e ligação dos conectores de radiofrequência (RF), é feito um estudo onde são apresentados os resultados da caraterização dos parâmetros S de um PIC com wire-bonding. Para o controlo térmico do módulo é apresentada uma técnica baseada em sensores de temperatura de ruténio e sensores de Platina e titânio testada numa PCB personalizad

Hybrid Micro-Electro-Mechanical Tunable Filter

While advantages such as good thermal stability and processing-chemical compatibilities exist for common monolithic-integrated micro-electro-mechanically tunable filters (MEM-TF) and MEM-tunable vertical cavity surface emitting lasers (MT-VCSEL), they often require full processing to determine device characteristics. Alternatively, the MEM actuators and the optical parts may be fabricated separately, then subsequently bonded. This hybrid approach potentially increases design flexibility. Since hybrid techniques allow integration of heterogeneous material systems, best of breed compound optoelectronic devices may be customized to enable materials groups to be optimized for tasks they are best suited. Thus, as a first step toward a hybrid (AlxGa1-xAs-polySi) MT-VCSEL, this dissertation reports the design, fabrication, and demonstration of an electrostatically actuated hybrid MEM-TF. A 250x250-µm2, 4.92-µm-thick, Al0.4Ga0.6As-GaAs distributed Bragg reflector was successfully flip-bonded to a polySi piston electrostatic actuator using SU-8 photoresist as bonding adhesive. The device demonstrated 53nm (936.5 - 989.5nm) of resonant wavelength tuning over the actuation voltage range of 0 to 10 V