39,406 research outputs found

    Checking-in on Network Functions

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    When programming network functions, changes within a packet tend to have consequences---side effects which must be accounted for by network programmers or administrators via arbitrary logic and an innate understanding of dependencies. Examples of this include updating checksums when a packet's contents has been modified or adjusting a payload length field of a IPv6 header if another header is added or updated within a packet. While static-typing captures interface specifications and how packet contents should behave, it does not enforce precise invariants around runtime dependencies like the examples above. Instead, during the design phase of network functions, programmers should be given an easier way to specify checks up front, all without having to account for and keep track of these consequences at each and every step during the development cycle. In keeping with this view, we present a unique approach for adding and generating both static checks and dynamic contracts for specifying and checking packet processing operations. We develop our technique within an existing framework called NetBricks and demonstrate how our approach simplifies and checks common dependent packet and header processing logic that other systems take for granted, all without adding much overhead during development.Comment: ANRW 2019 ~ https://irtf.org/anrw/2019/program.htm

    Alternative implementations of a fractional order control algorithm on FPGAs

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    Traditionally, microprocessor and digital signal processors have been used extensively in controlling simple processes, such as direct current motors. The Field Programmable Gate Arrays (FPGA) are currently emerging as an alternative to the previously used devices in controlling all sorts of processes. The fractional order proportional-integrative control algorithm has the advantage of enhancing the closed loop performance as compared to traditional proportional-integrative controllers, but the implementation requires a higher number of computations. Implementations of control algorithms on FPGAs are nowadays much faster than implementations on microprocessors. This allows for a more accurate digital realization of the fractional order controller. The paper presents nine alternative implementations of such control algorithm on two different FPGA targets. The experimental results, considering DC motor speed control, show that double, fixed-point and integer data representation may be used efficiently for control purposes

    Risk and Machine Protection for Stored Magnetic and Beam Energies

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    Risk is a fundamental consideration when designing electronic systems. For most systems a view of risk can assist in setting design objectives, whereas both a qualitative and quantitative understanding of risk is mandatory when considering protection systems. This paper gives an overview of the risks due to stored magnetic and beam energies in high-energy physics, and shows how a risk-based approach can be used to design new systems mitigating these risks, using a lifecycle inspired by IEC 61508. Designing new systems in high-energy physics can be challenging as new and novel techniques are difficult to quantify and predict. This paper shows how the same lifecycle approach can be used in reverse to analyse existing systems, following their operation and first experiences.Comment: 19 pages, contribution to the 2014 CAS - CERN Accelerator School: Power Converters, Baden, Switzerland, 7-14 May 201

    OCTAD-S: Digital Fast Fourier Transform Spectrometers by FPGA

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    We have developed a digital fast Fourier transform (FFT) spectrometer made of an analog-to-digital converter (ADC) and a field-programmable gate array (FPGA). The base instrument has independent ADC and FPGA modules, which allow us to implement different spectrometers in a relatively easy manner. Two types of spectrometers have been instrumented, one with 4.096 GS/s sampling speed and 2048 frequency channels and the other with 2.048 GS/s sampling speed and 32768 frequency channels. The signal processing in these spectrometers has no dead time and the accumulated spectra are recorded in external media every 8 ms. A direct sampling spectroscopy up to 8 GHz is achieved by a microwave track-and-hold circuit, which can reduce the analog receiver in front of the spectrometer. Highly stable spectroscopy with a wide dynamic range was demonstrated in a series of laboratory experiments and test observations of solar radio bursts.Comment: 20 pages, 7 figures, accepted for publication in Earth, Planets and Spac

    Framework Programmable Platform for the Advanced Software Development Workstation (FPP/ASDW). Demonstration framework document. Volume 1: Concepts and activity descriptions

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    The Framework Programmable Software Development Platform (FPP) is a project aimed at effectively combining tool and data integration mechanisms with a model of the software development process to provide an intelligent integrated software development environment. Guided by the model, this system development framework will take advantage of an integrated operating environment to automate effectively the management of the software development process so that costly mistakes during the development phase can be eliminated. The Advanced Software Development Workstation (ASDW) program is conducting research into development of advanced technologies for Computer Aided Software Engineering (CASE)
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