An ANFIS estimator based data aggregation scheme for fault tolerant Wireless Sensor Networks

AbstractWireless Sensor Networks (WSNs) are used widely in many mission critical applications like battlefield surveillance, environmental monitoring, forest fire monitoring etc. A lot of research is being done to reduce the energy consumption, enhance the network lifetime and fault tolerance capability of WSNs. This paper proposes an ANFIS estimator based data aggregation scheme called Neuro-Fuzzy Optimization Model (NFOM) for the design of fault-tolerant WSNs. The proposed scheme employs an Adaptive Neuro-Fuzzy Inference System (ANFIS) estimator for intra-cluster and inter-cluster fault detection in WSNs. The Cluster Head (CH) acts as the intra-cluster fault detection and data aggregation manager. It identifies the faulty Non-Cluster Head (NCH) nodes in a cluster by the application of the proposed ANFIS estimator. The CH then aggregates data from only the normal NCHs in that cluster and forwards it to the high-energy gateway nodes. The gateway nodes act as the inter-cluster fault detection and data aggregation manager. They pro-actively identify the faulty CHs by the application of the proposed ANFIS estimator and perform inter-cluster fault tolerant data aggregation. The simulation results confirm that the proposed NFOM data aggregation scheme can significantly improve the network performance as compared to other existing schemes with respect to different performance metrics

Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error

We propose a novel two-layer error control code, combining error detection capability of rectangular codes and error correction capability of Hamming product codes in an efficient way, in order to increase cache error resilience for many core systems, while maintaining low power, area and latency overhead. Based on the fact of low latency and overhead of rectangular codes and high error control capability of Hamming product codes, two-layer error control codes employ simple rectangular codes for each cache line to detect cache errors, while loading the extra Hamming product code checks bits in the case of error detection; thus enabling reliable large-scale cache operations. Analysis and experiments are conducted to evaluate the cache fault-tolerant capability of various existing solutions and the proposed approach. The results show that the proposed approach can significantly increase Mean-Error-To-Failure (METF) and Mean-Time-To-failure (MTTF) up to 2.8×, reduce storage overhead by over 57%, and increase instruction per-cycle (IPC) up to 7%, compared to complex four-way 4EC5ED; and it increases METF and MTTF up to 133×, reduces storage overhead by over 11%, and achieves a similar IPC compared to simple eight-way single-error correcting double-error detecting (SECDED). The cost of the proposed approach is no more than 4% external memory access overhead

On Fault Tolerance Methods for Networks-on-Chip

Technology scaling has proceeded into dimensions in which the reliability of manufactured devices is becoming endangered. The reliability decrease is a consequence of physical limitations, relative increase of variations, and decreasing noise margins, among others. A promising solution for bringing the reliability of circuits back to a desired level is the use of design methods which introduce tolerance against possible faults in an integrated circuit. This thesis studies and presents fault tolerance methods for network-onchip (NoC) which is a design paradigm targeted for very large systems-onchip. In a NoC resources, such as processors and memories, are connected to a communication network; comparable to the Internet. Fault tolerance in such a system can be achieved at many abstraction levels. The thesis studies the origin of faults in modern technologies and explains the classification to transient, intermittent and permanent faults. A survey of fault tolerance methods is presented to demonstrate the diversity of available methods. Networks-on-chip are approached by exploring their main design choices: the selection of a topology, routing protocol, and flow control method. Fault tolerance methods for NoCs are studied at different layers of the OSI reference model. The data link layer provides a reliable communication link over a physical channel. Error control coding is an efficient fault tolerance method especially against transient faults at this abstraction level. Error control coding methods suitable for on-chip communication are studied and their implementations presented. Error control coding loses its effectiveness in the presence of intermittent and permanent faults. Therefore, other solutions against them are presented. The introduction of spare wires and split transmissions are shown to provide good tolerance against intermittent and permanent errors and their combination to error control coding is illustrated. At the network layer positioned above the data link layer, fault tolerance can be achieved with the design of fault tolerant network topologies and routing algorithms. Both of these approaches are presented in the thesis together with realizations in the both categories. The thesis concludes that an optimal fault tolerance solution contains carefully co-designed elements from different abstraction levelsSiirretty Doriast

Performance improvements of automobile communication protocols in electromagnetic interference environments

Electromagnetic Interference (EMI) is frequently encountered in automobile communication systems due to a large number of inductive nodes used in these systems. This thesis investigates the effects of EMI on two types of automobile communication systems, the Controller Area Network (CAN) and the FlexRay. It also proposes a modified Automatic Repeat reQuest (ARQ) scheme to improve the communication performances in EMI environments --Abstract, page iii

Exploration of Erasure-Coded Storage Systems for High Performance, Reliability, and Inter-operability

With the unprecedented growth of data and the use of low commodity drives in local disk-based storage systems and remote cloud-based servers has increased the risk of data loss and an overall increase in the user perceived system latency. To guarantee high reliability, replication has been the most popular choice for decades, because of simplicity in data management. With the high volume of data being generated every day, the storage cost of replication is very high and is no longer a viable approach. Erasure coding is another approach of adding redundancy in storage systems, which provides high reliability at a fraction of the cost of replication. However, the choice of erasure codes being used affects the storage efficiency, reliability, and overall system performance. At the same time, the performance and interoperability are adversely affected by the slower device components and complex central management systems and operations. To address the problems encountered in various layers of the erasure coded storage system, in this dissertation, we explore the different aspects of storage and design several techniques to improve the reliability, performance, and interoperability. These techniques range from the comprehensive evaluation of erasure codes, application of erasure codes for highly reliable and high-performance SSD system, to the design of new erasure coding and caching schemes for Hadoop Distributed File System, which is one of the central management systems for distributed storage. Detailed evaluation and results are also provided in this dissertation

Deep brain drug-delivery control using vagus nerve communications

Vagus nerve stimulation (VNS) uses electrical impulses applied at the neck in order to mitigate the effects of, for example, epileptic seizures. We propose using VNS to provide data pulses to communicate with a drug-delivery system embedded near the brainstem. We model the generation of a vagus nerve compound action potential (CAP), calculating the signal attenuation and the resulting transmission range. The metabolic cost of CAP transmission in terms of the use of adenosine triphosphate (ATP) is also calculated. The channel capacity for on-off keying (OOK) is computed from the CAP characteristics, the neural refractory period and the level of background neural noise. The resulting low bit-rate, unidirectional asynchronous transmission system is analysed for the use of different methods of forward error correction (FEC) to improve bit-error rate (BER). We show a proposed data packet structure that could deliver instructions to an embedded drug-delivery system with multiple addressable drug reservoirs. We also analyse the scope for powering the drug-delivery system with energy harvested from cerebrospinal glucose

Securing a UAV Using Features from an EEG Signal

This thesis focuses on an approach which entails the extraction of Beta component of the EEG (Electroencephalogram) signal of a user and uses his/her EEG beta data to generate a random AES (Advanced Encryption Standard) encryption key. This Key is used to encrypt the communication between the UAVs (Unmanned aerial vehicles) and the ground control station. UAVs have attracted both commercial and military organizations in recent years. The progress in this field has reached significant popularity, and the research has incorporated different areas from the scientific domain. UAV communication became a significant concern when an attack on a Predator UAV occurred in 2009, which allowed the hijackers to get the live video stream. Since a UAVs major function depend on its onboard auto pilot, it is important to harden the system against vulnerabilities. In this thesis, we propose a biometric system to encrypt the UAV communication by generating a key which is derived from Beta component of the EEG signal of a user. We have developed a safety mechanism that gets activated in case the communication of the UAV from the ground control station gets attacked. This system was validated on a commercial UAV under malicious attack conditions during which we implement a procedure where the UAV return safely to an initially deployed "home" position