93,255 research outputs found

    Tutorial: Advanced fault tree applications using HARP

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    Reliability analysis of fault tolerant computer systems for critical applications is complicated by several factors. These modeling difficulties are discussed and dynamic fault tree modeling techniques for handling them are described and demonstrated. Several advanced fault tolerant computer systems are described, and fault tree models for their analysis are presented. HARP (Hybrid Automated Reliability Predictor) is a software package developed at Duke University and NASA Langley Research Center that is capable of solving the fault tree models presented

    An intelligent system by fuzzy reliability algorithm in fault tree analysis for nuclear power plant probabilistic safety assessment

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    © Imperial College Press. Fault tree analysis for nuclear power plant probabilistic safety assessment is an intricate process. Personal computer-based software systems have therefore been developed to conduct this analysis. However, all existing fault tree analysis software systems only accept quantitative data to characterized basic event reliabilities. In real-world applications, basic event reliabilities may not be represented by quantitative data but by qualitative justifications. The motivation of this work is to develop an intelligent system by fuzzy reliability algorithm in fault tree analysis, which can accept not only quantitative data but also qualitative information to characterized reliabilities of basic events. In this paper, a newly-developed system called InFaTAS-NuSA is presented and its main features and capabilities are discussed. To benchmark the applicability of the intelligent concept implemented in InFaTAS-NuSA, a case study is performed and the analysis results are compared to the results obtained from a well-known fault tree analysis software package. The results confirm that the intelligent concept implemented in InFaTAS-NuSA can be very useful to complement conventional fault tree analysis software systems

    Method and system for dynamic probabilistic risk assessment

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    The DEFT methodology, system and computer readable medium extends the applicability of the PRA (Probabilistic Risk Assessment) methodology to computer-based systems, by allowing DFT (Dynamic Fault Tree) nodes as pivot nodes in the Event Tree (ET) model. DEFT includes a mathematical model and solution algorithm, supports all common PRA analysis functions and cutsets. Additional capabilities enabled by the DFT include modularization, phased mission analysis, sequence dependencies, and imperfect coverage

    Fault Tree Analysis and Binary Decision Diagrams

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    Fault tree analysis is now commonly used to assess the adequacy, in reliability terms, of industrial systems. For complex systems an analysis may produce thousands of combinations of events which can cause system failure (minimal cut sets). The determination of these minimal cut sets can be a very time consuming process even on modern high speed digital computers. Also if the fault tree has many minimal cut sets calculating the exact top event probability will require extensive calculations. For many complex fault trees this requirement is beyond the capability of the availaible machines, thus approximation techiques need to be introduced resulting in loss of accuracy. This paper describes the use of Binary Descision Diagrams for Fault Tree Analysis and some ways in which it can be efficiently implimented on a computer. The work to date shows a substantial improvement in computational effort for large, complex fault trees analysis with this method in comparison to the traditional approach. The Binary Decision Diagram method has the additional advantage that approximations are not required, exact calculations for the top event parameters can be performed

    Choosing a heuristic for the “fault tree to binary decision diagram” conversion, using neural networks

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    Fault-tree analysis is commonly used for risk assessment of industrial systems. Several computer packages are available to carry out the analysis. Despite its common usage there are associated limitations of the technique in terms of accuracy and efficiency when dealing with large fault-tree structures. The most recent approach to aid the analysis of the fault-tree diagram is the BDD (binary decision diagram). To use the BDD, the fault-tree structure needs to be converted into the BDD format. Converting the fault tree is relatively straightforward but requires that the basic events of the tree be ordered. This ordering is critical to the resulting size of the BDD, and ultimately affects the qualitative and quantitative performance and benefits of this technique. Several heuristic approaches were developed to produce an optimal ordering permutation for a specific tree. These heuristic approaches do not always yield a minimal BDD structure for all trees. There is no single heuristic that guarantees a minimal BDD for any fault-tree structure. This paper looks at a selection approach using a neural network to choose the best heuristic from a set of alternatives that will yield the smallest BDD and promote an efficient analysis. The set of possible selection choices are 6 alternative heuristics, and the prediction capacity produced was a 70% chance of the neural network choosing the best ordering heuristic from the set of 6 for the test set of given fault trees

    An enhanced component connection method for conversion of fault trees to binary decision diagrams

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    Fault Tree Analysis (FTA) is widely applied to assess the failure probability of industrial systems. Many computer packages are available which are based on conventional Kinetic Tree Theory methods. When dealing with large (possibly non-coherent) fault trees, the limitations of the technique in terms of accuracy of the solutions and the efficiency of the processing time becomes apparent. Over recent years the Binary Decision Diagram (BDD) method has been developed that solves fault trees and overcomes the disadvantages of the conventional FTA approach. First of all, a fault tree for a particular system failure mode is constructed and then converted to a BDD for analysis. This paper analyses alternative methods for the fault tree to BDD conversion process. For most fault tree to BDD conversion approaches the basic events of the fault tree are placed in an ordering. This can dramatically affect the size of the final BDD and the success of qualitative and quantitative analyses of the system. A set of rules are then applied to each gate in the fault tree to generate the BDD. An alternative approach can also be used, where BDD constructs for each of the gate types are first built and then merged to represent a parent gate. A powerful and efficient property, sub-node sharing, is also incorporated in the enhanced method proposed in this paper. Finally a combined approach is developed taking the best features of the alternative methods. The efficiency of the techniques is analysed and discussed

    A Simple Component Connection Approach for Fault Tree Conversion to Binary

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    Fault Tree Analysis (FTA) is commonly used when conducting risk assessments of industrial systems. A number of computer packages based on conventional analysis methods are available to perform the analysis. However, dealing with large (possibly non-coherent) fault trees can expose the limitations of the technique in terms of accuracy of the solutions and the processing time required. Over recent years the Binary Decision Diagram (BDD) method has been developed for the solution of the fault tree and overcomes the disadvantages of the conventional FTA approaches. The usual way of taking advantage of the BDD structure is to construct a fault tree and then convert it to a BDD. This paper will focus on the fault tree to BDD conversion process. Converting the fault tree requires the basic events of the fault tree to be placed in an ordering. This is critical to the size of the final BDD and ultimately affects the qualitative and quantitative analysis of the system and benefits of this method. Once the ordering is established several approaches can be used for the BDD generation. One approach is to apply a set of rules developed by Rauzy which are repeatedly applied to each gate in the fault tree to generate the BDD. An alternative approach can be used when BDD constructs for each of the gate types are first built and then connected together. A subnode sharing feature in the second of these approaches and a third, hybrid, combined approach will be presented. Some remarks on the effectiveness of these techniques will be provided

    On Fault-Tree Analysis : A Possibilistic Approach

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    Top event failure probabilities are normally calculated using the exact values of the components failure probabilities in case of fault-tree analysis. There are some systems where evaluation of failure probabilities of components are very difficult based on the past occurrences because of system environments change. Moreover, failure of component which has never failed before must often be considered. Therefore, an approach based on possibility of failure i.e a fuzzy set defined in probability space has been introduced & finally possibility of failure of top event based on fuzzy fault-tree model is calculated considering the trapezoidal nature possibility of failure of components by developing a generalized computer program

    Fault tree analysis for system modeling in case of intentional EMI

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    The complexity of modern systems on the one hand and the rising threat of intentional electromagnetic interference (IEMI) on the other hand increase the necessity for systematical risk analysis. Most of the problems can not be treated deterministically since slight changes in the configuration (source, position, polarization, ...) can dramatically change the outcome of an event. For that purpose, methods known from probabilistic risk analysis can be applied. One of the most common approaches is the fault tree analysis (FTA). The FTA is used to determine the system failure probability and also the main contributors to its failure. In this paper the fault tree analysis is introduced and a possible application of that method is shown using a small computer network as an example. The constraints of this methods are explained and conclusions for further research are drawn
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