LOW-JITTER AND LOW-SPUR RING-OSCILLATOR-BASED PHASE-LOCKED LOOPS

Department of Electrical EngineeringIn recent years, ring-oscillator based clock generators have drawn a lot of attention due to the merits of high area efficiency, potentially wide tuning range, and multi-phase generation. However, the key challenge is how to suppress the poor jitter of ring oscillators. There have been many efforts to develop a ring-oscillator-based clock generator targeting very low-jitter performance. However, it remains difficult for conventional architectures to achieve both low RMS jitter and low levels of reference spurs concurrently while having a high multiplication factor. In this dissertation, a time-domain analysis is presented that provides an intuitive understanding of RMS jitter calculation of the clock generators from their phase-error correction mechanisms. Based on this analysis, we propose new designs of a ring-oscillator-based PLL that addresses the challenges of prior-art ring-based architectures. This dissertation introduces a ring-oscillator-based PLL with the proposed fast phase-error correction (FPEC) technique, which emulates the phase-realignment mechanism of an injection-locked clock multiplier (ILCM). With the FPEC technique, the phase error of the voltage-controlled oscillator (VCO) is quickly removed, achieving ultra-low jitter. In addition, in the transfer function of the proposed architecture, an intrinsic integrator is involved since it is naturally based on a PLL topology. The proposed PLL can thus have low levels of reference spurs while maintaining high stability even for a large multiplication factor. Furthermore, it presents another design of a digital PLL embodying the FPEC technique (or FPEC DPLL). To overcome the problem of a conventional TDC, a low-power optimally-spaced (OS) TDC capable of effectively minimizing the quantization error is presented. In the proposed FPEC DPLL, background digital controllers continuously calibrate the decision thresholds and the gain of the error correction by the loop to be optimal, thus dramatically reducing the quantization error. Since the proposed architecture is implemented in a digital fashion, the variables defining the characteristics of the loop can be easily estimated and calibrated by digital calibrators. As a result, the performances of an ultra-low jitter and the figure-of-merit can be achieved.clos

ULTRA-LOW-JITTER, MMW-BAND FREQUENCY SYNTHESIZERS BASED ON A CASCADED ARCHITECTURE

Department of Electrical EngineeringThis thesis presents an ultra-low-jitter, mmW-band frequency synthesizers based on a cascaded architecture. First, the mmW-band frequency synthesizer based on a CP PLL is presented. At the first stage, the CP PLL operating at GHz-band frequencies generated low-jitter output signals due to a high-Q VCO. At the second stage, an ILFM operating at mmW-band frequencies has a wide injection bandwidth, so that the jitter performance of the mmW-band output signals is determined by the GHz-range PLL. The proposed ultra-low-jitter, mmW-band frequency synthesizer based on a CP PLL, fabricated in a 65-nm CMOS technology, generated output signals from GHz-band frequencies to mmW-band frequencies, achieving an RMS jitter of 206 fs and an IPN of ???31 dBc. The active silicon area and the total power consumption were 0.32 mm2 and 42 mW, respectively. However, due to a large in-band phase noise contribution of a PFD and a CP in the CP PLL, this first stage was difficult to achieve an ultra-low in-band phase noise. Second, to improve the in-band phase noise further, the mmW-band frequency synthesizer based on a digital SSPLL is presented. At the first stage, the digital SSPLL operating at GHz-band frequencies generated ultra-low-jitter output signals due to its sub-sampling operation and a high-Q GHz VCO. To minimize the quantization noise of the voltage quantizer in the digital SSPLL, this thesis presents an OSVC as a voltage quantizer while a small amount of power was consumed. The proposed ultra-low-jitter, mmW-band frequency synthesizer fabricated in a 65-nm CMOS technology, generated output signals from GHz-band frequencies to mmW-band frequencies, achieving an RMS jitter of 77 fs and an IPN of ???40 dBc. The active silicon area and the total power consumption were 0.32 mm2 and 42 mW, respectively.clos

Robust Design With Increasing Device Variability In Sub-Micron Cmos And Beyond: A Bottom-Up Framework

My Ph.D. research develops a tiered systematic framework for designing process-independent and variability-tolerant integrated circuits. This bottom-up approach starts from designing self-compensated circuits as accurate building blocks, and moves up to sub-systems with negative feedback loop and full system-level calibration. a. Design methodology for self-compensated circuits My collaborators and I proposed a novel design methodology that offers designers intuitive insights to create new topologies that are self-compensated and intrinsically process-independent without external reference. It is the first systematic approaches to create "correct-by-design" low variation circuits, and can scale beyond sub-micron CMOS nodes and extend to emerging non-silicon nano-devices. We demonstrated this methodology with an addition-based current source in both 180nm and 90nm CMOS that has 2.5x improved process variation and 6.7x improved temperature sensitivity, and a GHz ring oscillator (RO) in 90nm CMOS with 65% reduction in frequency variation and 85ppm/oC temperature sensitivity. Compared to previous designs, our RO exhibits the lowest temperature sensitivity and process variation, while consuming the least amount of power in the GHz range. Another self-compensated low noise amplifiers (LNA) we designed also exhibits 3.5x improvement in both process and temperature variation and enhanced supply voltage regulation. As part of the efforts to improve the accuracy of the building blocks, I also demonstrated experimentally that due to "diversification effect", the upper bound of circuit accuracy can be better than the minimum tolerance of on-chip devices (MOSFET, R, C, and L), which allows circuit designers to achieve better accuracy with less chip area and power consumption. b. Negative feedback loop based sub-system I explored the feasibility of using high-accuracy DC blocks as low-variation "rulers-on-chip" to regulate high-speed high-variation blocks (e.g. GHz oscillators). In this way, the trade-off between speed (which can be translated to power) and variation can be effectively de-coupled. I demonstrated this proposed structure in an integrated GHz ring oscillators that achieve 2.6% frequency accuracy and 5x improved temperature sensitivity in 90nm CMOS. c. Power-efficient system-level calibration To enable full system-level calibration and further reduce power consumption in active feedback loops, I implemented a successive-approximation-based calibration scheme in a tunable GHz VCO for low power impulse radio in 65nm CMOS. Events such as power-up and temperature drifts are monitored by the circuits and used to trigger the need-based frequency calibration. With my proposed scheme and circuitry, the calibration can be performed under 135pJ and the oscillator can operate between 0.8 and 2GHz at merely 40[MICRO SIGN]W, which is ideal for extremely power-and-cost constraint applications such as implantable biomedical device and wireless sensor networks

Testing the Quantumness of Atom Trajectories

This thesis reports on a novel concept of state-dependent transport, which achieves an unprecedented control over the position of individual atoms in optical lattices. Utilizing this control I demonstrate an experimental violation of the Leggett Garg inequality, which rigorously excludes (i.e. falsifies) any explanation of quantum transport based on classical, well-defined trajectories. Furthermore, I demonstrate the generation of arbitrary low-entropy states of neutral atoms following a bottom-up approach by rearranging a dilute thermal ensemble into a predefined, ordered distribution in a one-dimensional optical lattice. Additionally, I probe two-particle quantum interference effects of two atom trajectories by realizing a microwave Hong-Ou-Mandel interferometer with massive particles, which are cooled into the vibrational ground state. The first part of this thesis reports on several new experimental tools and techniques: three-dimensional ground state cooling of single atoms, which are trapped in the combined potential of a polarization-synthesized optical lattice and a blue-detuned hollow dipole potential; A high-NA (0.92) objective lens achieving a diffraction limited resolution of 460 nm; and an improved super-resolution algorithm, which resolves the position of individual atoms in small clusters at high filling factors, even when each lattice site is occupied. The next part is devoted to the conceptually new optical-lattice technique that relies on a high-precision, high-bandwidth synthesis of light polarization. Polarization-synthesized optical lattices provide two fully controllable optical lattice potentials, each of them confining only atoms in either one of the two long-lived hyperfine states. By employing one lattice as the storage register and the other one as the shift register, I provide a proof of concept that selected regions of the periodic potential can be filled with one particle per site. In the following part I report on a stringent test of the non-classicality of the motion of a massive quantum particle, which propagates on a discrete lattice. Measuring temporal correlations of the position of single atoms performing a quantum walk, we observe a 6σ (standard deviation) violation of the Leggett-Garg inequality. The experiment is carried out using so-called ideal negative measurements – an essential requisite for any genuine Leggett-Garg test – which acquire information about the atom’s position while avoiding any direct interaction with it. This interaction-free measurement is based on our polarization-synthesized optical lattice, which allows us to directly probe the absence rather than the presence of atoms at a chosen lattice site. Beyond its fundamental aspect, I demonstrate the application of the Leggett-Garg correlation function as a witness of quantum superposition. The witness allows us to discriminate the quantumness of different types of walks spanning from merely classical to quantum dynamics and further to witness the decoherence of a quantum state. In the last experimental part I will discuss recent results on collisional losses due to inelastic collisions occurring at high two-atom densities and demonstrate a Hong-Ou-Mandel interference with massive particles. Our precise control over individual indistinguishable particles embodies a direct analogue of the original Hong-Ou-Mandel experiment. By carrying out a Monte Carlo analysis of our experimental data, I demonstrate a signature of the two-particle interference of two-atom trajectories with a statistical significance of 4σ. In the final part I will introduce several new experiments which can be realized with the tools and techniques developed in this thesis, spanning from the detection of topologically protected edge states to the prospect of building a one-million-operation quantum cellular automaton

Exploiting Stochastic Resonance to Enhance the Performance of Digital Bang-Bang PLLs

In this paper, the multifaceted behavior of bang-bang digital phase-locked loops is explored. It is proved that a stochastic resonance phenomenon occurs at the balance between the quantization and intrinsic noise of the digitally controlled oscillator, which resides into the loop. How this condition maximizes the signal to-noise performance is shown. The loop parameter value that yields stochastic resonance is provided in closed form

RF CMOS Oscillators for Modern Wireless Applications

While mobile phones enjoy the largest production volume ever of any consumer electronics products, the demands they place on radio-frequency (RF) transceivers are particularly aggressive, especially on integration with digital processors, low area, low power consumption, while being robust against process-voltage-temperature variations. Since mobile terminals inherently operate on batteries, their power budget is severely constrained. To keep up with the ever increasing data-rate, an ever-decreasing power per bit is required to maintain the battery lifetime. The RF oscillator is the second most power-hungry block of a wireless radio (after power amplifiers). Consequently, any power reduction in an RF oscillator will greatly benefit the overall power efficiency of the cellular transceiver. Moreover, the RF oscillators' purity limits the transceiver performance. The oscillator's phase noise results in power leakage into adjacent channels in a transmit mode and reciprocal mixing in a receive mode. On the other hand, the multi-standard and multi-band transceivers that are now trending demand wide tuning range oscillators. However, broadening the oscillator’s tuning range is usually at the expense of die area (cost) or phase noise. The main goal of this book is to bring forth the exciting and innovative RF oscillator structures that demonstrate better phase noise performance, lower cost, and higher power efficiency than currently achievable. Technical topics discussed in RF CMOS Oscillators for Modern Wireless Applications include: Design and analysis of low phase-noise class-F oscillators Analyze a technique to reduce 1/f noise up-conversion in the oscillators Design and analysis of low power/low voltage oscillators Wide tuning range oscillators Reliability study of RF oscillators in nanoscale CMO

Bioprocess Monitoring and Control

Process monitoring and control are fundamental to all processes; this holds especially for bioprocesses, due to their complex nature. Usually, bioprocesses deal with living cells, which have their own regulatory systems. It helps to adjust the cell to its environmental condition. This must not be the optimal condition that the cell needs to produce whatever is desired. Therefore, a close monitoring of the cell and its environment is essential to provide optimal conditions for production. Without measurement, no information of the current process state is obtained. In this book, methods and techniques are provided for the monitoring and control of bioprocesses. From new developments for sensors, the application of spectroscopy and modelling approaches, the estimation and observer implementation for ethanol production and the development and scale-up of various bioprocesses and their closed loop control information are presented. The processes discussed here are very diverse. The major applications are cultivation processes, where microorganisms were grown, but also an incubation process of bird’s eggs, as well as an indoor climate control for humans, will be discussed. Altogether, in 12 chapters, nine original research papers and three reviews are presented