Printed Circuit Board (PCB) design process and fabrication

This module describes main characteristics of Printed Circuit Boards (PCBs). A brief history of PCBs is introduced in the first chapter. Then, the design processes and the fabrication of PCBs are addressed and finally a study case is presented in the last chapter of the module.Peer ReviewedPostprint (published version

Application of artificial intelligence techniques to probeless fault diagnosis of printed circuit boards

This thesis describes investigations which led to the development of a failure diagnosis expert system for printed circuit boards which exploits functional test data. The boards considered are highly complex mixed signal (analogue and digital) systems. The data is output from automatic test equipment which is used to test every board subsequent to manufacture.The use of a conventional machine learning technique produced only limited success due to the very large search space of failure reports. This also ruled out the use of some conventional knowledge-based approaches. In addition, there was a requirement to track changes m printed circuit board design and manufacture which also ruled out some techniques.Our investigations lead to the development of a system which tracks changes by learning in a more restricted search space derived from the original space of reports. The system performs a diagnosis by matching a failure report with information about previously seen reports. Both exact and inexact matching were investigated. The matching rules used are heuristic. The system also uses basic circuit connectivity information in conjunction with the matching procedure to improve diagnostic performance especially in cases where matching fails to identify a unique component

Cost modelling and concurrent engineering for testable design

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.As integrated circuits and printed circuit boards increase in complexity, testing becomes a major cost factor of the design and production of the complex devices. Testability has to be considered during the design of complex electronic systems, and automatic test systems have to be used in order to facilitate the test. This fact is now widely accepted in industry. Both design for testability and the usage of automatic test systems aim at reducing the cost of production testing or, sometimes, making it possible at all. Many design for testability methods and test systems are available which can be configured into a production test strategy, in order to achieve high quality of the final product. The designer has to select from the various options for creating a test strategy, by maximising the quality and minimising the total cost for the electronic system. This thesis presents a methodology for test strategy generation which is based on consideration of the economics during the life cycle of the electronic system. This methodology is a concurrent engineering approach which takes into account all effects of a test strategy on the electronic system during its life cycle by evaluating its related cost. This objective methodology is used in an original test strategy planning advisory system, which allows for test strategy planning for VLSI circuits as well as for digital electronic systems. The cost models which are used for evaluating the economics of test strategies are described in detail and the test strategy planning system is presented. A methodology for making decisions which are based on estimated costing data is presented. Results of using the cost models and the test strategy planning system for evaluating the economics of test strategies for selected industrial designs are presented

A Specification For A Next Generation Cad Toolkit For Electronics Product Design

Electronic engineering product design is a complex process which has enjoyed an increasing provision of computer based tools since the early 1980's. Over this period computer aided design tool development has progressed at such a pace that new features and functions have tended to be market driven. As such CAD tools have not been developed through the recommended practise of defining a functional specification prior to any software code generation. This thesis defines a new functional specification for next generation CAD tools to support the electronics product design process. It is synthesized from a review of the use of computers in the electronics product design process, from a case study of Best Practices prevalent in a wide range of electronics companies and from a new model of the design process. The model and the best practices have given rise to a new concept for company engineering documentation, the Product Book which provides a logical framework for constraining CAD tools and their users (designers) as means of controlling costs in the design process. This specification differs from current perceptions of computer functionality in the CAD tool industry by addressing human needs together with company needs of computer supported design, rather than just providing more technological support for the designer in isolation.Racal Reda

Shuttle Ground Operations Efficiencies/Technologies (SGOE/T) study. Volume 2: Ground Operations evaluation

The Ground Operations Evaluation describes the breath and depth of the various study elements selected as a result of an operational analysis conducted during the early part of the study. Analysis techniques used for the evaluation are described in detail. Elements selected for further evaluation are identified; the results of the analysis documented; and a follow-on course of action recommended. The background and rationale for developing recommendations for the current Shuttle or for future programs is presented

STR: a student developed star tracker for the ESA-LED ESMO moon mission

In the frame of their engineering degree, ISAE’s students are developing a Star Tracker, with the aim of being the core attitude estimation equipment of the European Moon Student Orbiter. This development goes on since several years and is currently in phase B. We intend to start building an integrated breadboard for the end of the academic year. The STR is composed of several sub-systems: the optical and detection sub-system, the electronics, the mechanics and the software. The optical detection part is based on an in-house developed new generation of APS detectors. The optical train is made of several lenses enclosed in a titanium tube. The electronics includes a FPGA for the pre-processing of the image and a microcontroller in order to manage the high level functions of the instrument. The mechanical part includes the electronics box, as well as the sensor baffle. The design is optimized to minimize the thermo-elastic noise of the assembly. Embedded on ESMO platform, this Star Tracker will be able to compute the satellite‘s attitude, taking into account the specific requirements linked to a Moon mission (illumination, radiation requirements and baffle adaptation to lunar orbit). In order to validate the design, software end-to-end simulation will include a complete simulation of the STR in its lunar dynamic environment. Therefore, we are developing a simple orbital model for the mission (including potential dazzling by celestial bodies)

In Situ Calibration of Heterogeneous Acquisition Systems: The Monitoring System of a Photovoltaic Plant

This paper deals with the metrological management of an acquisition system that has been developed for monitoring an experimental photovoltaic (PV) plant. The acquisition system has been conceived for comparing the performance of different PV technologies and for verifying the nominal specifications of the PV modules. For these reasons, the traceability of the monitoring system has to be ensured, and therefore, it must be periodically calibrated. A remotely exercised procedure is proposed for the calibration of the acquisition system, which is based on a calibrator specifically designed for this application. This calibrator has the capability to act as a reference for heterogeneous quantities, including electrical quantities, temperature, and solar irradiance. The architecture of this calibrator is described, and experimental results for the preliminary characterization of the prototype are described

Creation and detection of hardware trojans using non-invasive off-the-shelf technologies

As a result of the globalisation of the semiconductor design and fabrication processes, integrated circuits are becoming increasingly vulnerable to malicious attacks. The most concerning threats are hardware trojans. A hardware trojan is a malicious inclusion or alteration to the existing design of an integrated circuit, with the possible effects ranging from leakage of sensitive information to the complete destruction of the integrated circuit itself. While the majority of existing detection schemes focus on test-time, they all require expensive methodologies to detect hardware trojans. Off-the-shelf approaches have often been overlooked due to limited hardware resources and detection accuracy. With the advances in technologies and the democratisation of open-source hardware, however, these tools enable the detection of hardware trojans at reduced costs during or after production. In this manuscript, a hardware trojan is created and emulated on a consumer FPGA board. The experiments to detect the trojan in a dormant and active state are made using off-the-shelf technologies taking advantage of different techniques such as Power Analysis Reports, Side Channel Analysis and Thermal Measurements. Furthermore, multiple attempts to detect the trojan are demonstrated and benchmarked. Our simulations result in a state-of-the-art methodology to accurately detect the trojan in both dormant and active states using off-the-shelf hardware

A complete system for controlling and monitoring the timing of the LHCb experiment

The LHCb experiment at CERN will study the results of the production of B/antiB in the LHC accelerator mesons with the higher precision ever. It is vital that the experiment is able to record sub-detectors signals at the optimal detector efficiency, referring to the right collision occurring in the LHC ring, and that those signals are stable, clean and reliable. The solution is the development of a complete system to centrally time align and at the same time to monitor the timing of the whole experiment. An electronics custom-made acquisition board, called Beam Phase and Intensity Monitor (BPIM), has the main aim to monitor the beam processing a bipolar signal coming from a dedicated Beam Pick-Up detector, sitting along the LHC ring and whose signal is a clear representation of the bunches of protons. The BPIM is then able to integrate the intensity of the beam and at the same time to compare the phase of the bunch signal with the clock coming from the timing distribution system as well as the phase of the orbit signal with the signal generated from the first beam bunch. The principal applications of the BPIM are to determine the position of the orbit signal locally, to monitor bunch-by-bunch the clock phase with respect to the bunch passing through the detector, to have a clear structure of the beam injected, to determine the exact trigger conditions for sampling events in the detector, to determine the exact trigger conditions for significative events of not, checking whether the detector samples a bunch with protons (or lead ions) or an empty bunch, to produce an empty crossing veto for the sampled events whenever a bunch is absent in the expected location, to have a relative measure of the intensities of bunch, to have instantaneaous information about the presence/absence of beam, and, not less important, to search for ghost bunches. The board is paired with the RF2TTC system developed by the LHC group and whose aim is to control, clean, convert and transmit the bunch clock (~40 MHz) and the orbit clock (~11 KHz) to the the whole experiment. A complete user-friendly interface system, developed using the SCADA software PVSS II with the Distributed Information Management (DIM) system as communication protocol, allows to control and monitor real-time the available information