Built-In Self-Test Methodology for A/D Converters

A (partial) Built-in Self-Test (BIST) methodology is proposed for analog to digital (A/D) converters. In this methodology the number of bits of the A/D converter that needs to be monitored externally in a test is reduced. This reduction depends, among other things, on the frequency of the applied test signal. At low test signal frequencies only the least significant bit (LSB) needs to be monitored and a "full" BIST becomes feasible. An analysis is made of the trade-off between the size of the on-chip test circuitry and the accuracy of this BIST techniqu

ASDTIC control and standardized interface circuits applied to buck, parallel and buck-boost dc to dc power converters

Versatile standardized pulse modulation nondissipatively regulated control signal processing circuits were applied to three most commonly used dc to dc power converter configurations: (1) the series switching buck-regulator, (2) the pulse modulated parallel inverter, and (3) the buck-boost converter. The unique control concept and the commonality of control functions for all switching regulators have resulted in improved static and dynamic performance and control circuit standardization. New power-circuit technology was also applied to enhance reliability and to achieve optimum weight and efficiency

Analysis of an On-Line Stability Monitoring Approach for DC Microgrid Power Converters

An online approach to evaluate and monitor the stability margins of dc microgrid power converters is presented in this paper. The discussed online stability monitoring technique is based on the Middlebrook's loop-gain measurement technique, adapted to the digitally controlled power converters. In this approach, a perturbation is injected into a specific digital control loop of the converter and after measuring the loop gain, its crossover frequency and phase margin are continuously evaluated and monitored. The complete analytical derivation of the model, as well as detailed design aspects, are reported. In addition, the presence of multiple power converters connected to the same dc bus, all having the stability monitoring unit, is also investigated. An experimental microgrid prototype is implemented and considered to validate the theoretical analysis and simulation results, and to evaluate the effectiveness of the digital implementation of the technique for different control loops. The obtained results confirm the expected performance of the stability monitoring tool in steady-state and transient operating conditions. The proposed method can be extended to generic control loops in power converters operating in dc microgrids

Analog-to-digital conversion techniques for precision photometry

Three types of analog-to-digital converters are described: parallel, successive-approximation, and integrating. The functioning of comparators and sample-and-hold amplifiers is explained. Differential and integral linearity are defined, and good and bad examples are illustrated. The applicability and relative advantages of the three types of converters for precision astronomical photometric measurements are discussed. For most measurements, integral linearity is more important than differential linearity. Successive-approximation converters should be used with multielement solid state detectors because of their high speed, but dual slope integrating converters may be superior for use with single element solid state detectors where speed of digitization is not a factor. In all cases, the input signal should be tailored so that they occupy the upper part of the converter's dynamic range; this can be achieved by providing adjustable gain, or better by varying the integration time of the observation if possible

Efficient DSP and Circuit Architectures for Massive MIMO: State-of-the-Art and Future Directions

Massive MIMO is a compelling wireless access concept that relies on the use of an excess number of base-station antennas, relative to the number of active terminals. This technology is a main component of 5G New Radio (NR) and addresses all important requirements of future wireless standards: a great capacity increase, the support of many simultaneous users, and improvement in energy efficiency. Massive MIMO requires the simultaneous processing of signals from many antenna chains, and computational operations on large matrices. The complexity of the digital processing has been viewed as a fundamental obstacle to the feasibility of Massive MIMO in the past. Recent advances on system-algorithm-hardware co-design have led to extremely energy-efficient implementations. These exploit opportunities in deeply-scaled silicon technologies and perform partly distributed processing to cope with the bottlenecks encountered in the interconnection of many signals. For example, prototype ASIC implementations have demonstrated zero-forcing precoding in real time at a 55 mW power consumption (20 MHz bandwidth, 128 antennas, multiplexing of 8 terminals). Coarse and even error-prone digital processing in the antenna paths permits a reduction of consumption with a factor of 2 to 5. This article summarizes the fundamental technical contributions to efficient digital signal processing for Massive MIMO. The opportunities and constraints on operating on low-complexity RF and analog hardware chains are clarified. It illustrates how terminals can benefit from improved energy efficiency. The status of technology and real-life prototypes discussed. Open challenges and directions for future research are suggested.Comment: submitted to IEEE transactions on signal processin

Comparative Analysis among DSP and FPGA-based Control Capabilities in PWM Power Converters

PWM power converters are close to be mature for standard diffusion. New FPGA technologies could now realise at best the digital control key-points: flexible performance and time to market. The paper deals with the new digital control properties of FPGA-based techniques. On the basis of reference structures, a comparative analysis is carried-out trading-off dynamic performances and immunity to PWM environment. All possible sampled control or DSP techniques are firstly analysed and compared to each other. A breakthrough concept for FPGAs is defined, definitely solving for PWM feedback immunity by practical over-sampling and parallel processing while improving dynamic performances. Simulation tests and the application of dead-beat control clearly point-out the respective dynamic properties

Power meter for Highly-Distorted Three-Phase Systems

This paper describes a low-cost, three-phase power meter, which is based on a fast, specially designed acquisition board coupled to a PC via the PC parallel/printer port or by means of an AT card. The power associated with the fundamental and first harmonics is computed by software that operates in the time domain and employs a sample-weighting procedure that makes the uncertainty related to the asynchronous sampling negligible. The low-cost acquisition board features two 8-bit 1 MHz converters and a local RAM, which decouples the PC clock from the measurement requirements. Hall effect transducers are used for the current channels and fast differential amplifiers for the voltage channels. The fast sampling frequency allows simple antialiasing filters to be employed. Digital filtering is used to reduce the sample number while increasing the resolution. The power uncertainty provided by this arrangement is less then 0.1 % with 2.5 measurements per second when a low-cost 486DX33-based PC is use

Three Realizations and Comparison of Hardware for Piezoresistive Tactile Sensors

Tactile sensors are basically arrays of force sensors that are intended to emulate the skin in applications such as assistive robotics. Local electronics are usually implemented to reduce errors and interference caused by long wires. Realizations based on standard microcontrollers, Programmable Systems on Chip (PSoCs) and Field Programmable Gate Arrays (FPGAs) have been proposed by the authors for the case of piezoresistive tactile sensors. The solution employing FPGAs is especially relevant since their performance is closer to that of Application Specific Integrated Circuits (ASICs) than that of the other devices. This paper presents an implementation of such an idea for a specific sensor. For the purpose of comparison, the circuitry based on the other devices is also made for the same sensor. This paper discusses the implementation issues, provides details regarding the design of the hardware based on the three devices and compares them.This work has been partially funded by the Spanish Government under contracts TEC2006-12376 and TEC2009-14446