Enhancements to ACL2 in Versions 6.2, 6.3, and 6.4

We report on improvements to ACL2 made since the 2013 ACL2 Workshop.Comment: In Proceedings ACL2 2014, arXiv:1406.123

Harnessing Yarrowia lipolytica’s potential as a lipid and alkane production platform

Engineering cellular phenotype can enable the in vivo synthesis of renewable fuels, industrial precursors, and pharmaceuticals. Achieving economic viability requires the use of a cellular platform that generates high titers independent of fermentation condition, through either native or imported biosynthetic metabolism. While lacking fully developed genetic tools, the oleaginous yeast Yarrowia lipolytica has the native capacity to produce large titers of lipids and citric acid cycle intermediates. However, unlocking this biosynthetic capacity requires complete rewiring of native metabolism. To this end, this work focuses on the development and engineering of the yeast Y. lipolytica to rewire native metabolism and enable the production of lipids, alkanes, and itaconic acid. Precise control of gene expression is a requisite to enable metabolic and pathway engineering applications for any host organism. However, Y. lipolytica lacks promoter elements strong enough to manipulate intracellular metabolism. Thus, we utilized a hybrid promoter engineering approach to produce libraries of high-expressing, tunable promoters, seven-fold stronger than promoters previously characterized in Y. lipolytica 1,2. We successfully applied this approach to Saccharomyces cerevisiae, expanding transcriptional capacity of the strongest constitutive to highlight our hybrid approach as a generalizable method to increase expression capacity in eukaryotic organisms 3. We utilized our novel Y. lipolytica hybrid promoters to drive intracellular metabolism towards lipid production and to overexpress heterologous enzymes that enable alkane and itaconic acid production. Specifically, we implemented a global rewiring of Y. lipolytica’s native metabolism to increase lipogenesis more than sixty fold to 25.3g/L (the highest lipid production ever reported) and generated cells nearly 90% lipid content. We further expressed a lipoxygenase enzyme to catalyze the novel microbial production of the short-chain n-alkane, pentane. Finally, we exploited Y. lipolytica’s capacity to accumulate citric acid cycle intermediates by expressing a heterologous cis-aconitic acid decarboxylase enzyme to produce itaconic acid. Increasing substrate availability through media optimization and genomic engineering increased pentane and itaconic acid production threefold and eightfold, respectively 4. Collectively, these studies have facilitated the utilization of Y. lipolytica as an industrially relevant microbial platform, and represent a generic approach towards enabling biosynthetic control in microbial hosts will ill-defined gene expression technology.Chemical Engineerin

Engineering Yarrowia lipolytica for high lipid production

Among potential value-added fuels and chemicals, fatty acid-based chemicals are important due to their wide use in industrial processes and in daily life. Fatty acids produced from microbial systems could provide a sustainable supply to replace the current costly and unsustainable process using plant oil or animal fat. The oleaginous yeast Yarrowia lipolytica naturally possesses moderate lipid production capacity and grows on different kinds of biomass and organic waste. However, fatty acid production from native, un-engineered strains is not economically viable. Therefore, this work develops strategies inspired from synthetic biology and metabolic engineering to expand the engineering potential of Y. lipolytica — helping to establish this organism as a premier platform for industrial-level, high lipid production as well as providing a platform for uncovering novel understanding of lipogenesis. To do so, first, novel synthetic promoters and high expression plasmid were necessary to achieve the ability to tune gene expression levels inside the cell. We developed a hybrid promoter engineering strategy to create a promoter library exhibiting a range of more than 400-fold in terms of mRNA levels as well as engineered plasmids with regulated centromeric function to achieve a 2.7 fold expression range. Next, a rational and evolutionary metabolic engineering approach was coupled with genomic and transcriptomic studies to both engineer and understand underlying lipogenesis in this organism. Through the engineering efforts, we successfully increased the lipid production titer to over 40 g/L in bioreactor as well as identified novel lipogenic enhancers and mechanisms. In addition, we identified and characterized a mutant mga2 protein with superior lipogenesis enhancing capacity, which can regulate fatty acid desaturation and carbon flux inside the cells. Collectively, these studies have facilitated the utilization of Y. lipolytica as an industrially relevant microbial lipid production platform and supplied novel understanding of its lipogenesis process. The methods and concepts developed here can also be adapted to other oleaginous microbes and serve as a template for enabling value-added chemical production in other nonconventional organism.Biochemistr

Declarative theorem proving for operational semantics

iAbstract The aim of this Masters Thesis is to propose to SYSteam Nät AB, a local Internet Service Provider (ISP) in Uppsala, Sweden, how to implement IP telephony in their existing IT-infrastructure as a service to their customers. Thus the perspective of the thesis will be that of a local Internet Service Provider. Three general areas are covered in the thesis: Market and Business Model, Technology, and Economics. Important issues for SYSteam Nät AB as an established local broadband Internet Service Provider are to both retain present customers and to attract new customers. Some believe that offering value added services such as IP telephony could do this. Implementation of IP telephony can be done in different ways to fulfil SYSteam Nät’s requirements. The analysis leads to a proposal of how SYSteam Nät could implement IP telephony. This involves many multi-faceted business, technical, and financial issues; each aspect is examined in this thesis. ii Sammanfattnin

Automating the Formal Verification of Software

Formally verified correctness is one of the most desirable properties of software systems. Despite great progress made toward verification via interactive proof assistants, such as Coq and Isabelle/HOL, such verification remains one of the most effort-intensive (and often prohibitively difficult) software development activities. Recent work has created tools that automatically synthesize proofs either through reasoning using precomputed facts or using machine learning to model proofs and then perform biased search through the proof space. However, models in existing tools fail to capture the richness present in proofs, such as the information the programmer has access to when writing proofs and the natural language contained within variable names. Furthermore, these prior models do not make use of variations in the learning process and advances in large language models. In this dissertation, I develop tools to improve proof synthesis and to enable fully automating more verification. I first present TacTok, a proof-synthesis tool that models proofs using both the partial proof written thus far and the semantics of the proof state. I then present Diva, a proof-synthesis tool that controls the learning process to produce a diverse set of models and, due to the unique nature of proof synthesis (the existence of the theorem prover, an oracle that infallibly judges a proof’s correctness), efficiently combines these models to improve the overall proving power. I then present Passport, a proof-synthesis tool that systematically explores different ways of encoding identifiers in proofs to improve synthesis. Finally, I present Baldur, a proof-synthesis tool that uses transformer-based pretrained large language models fine-tuned on proofs to generate and repair whole proofs at once, rather than one step at a time. This dissertation contributes new ideas for improving automated proof synthesis and empirically demonstrates that the improvement is significant on large benchmarks consisting of open-source software projects

Interaction in Concurrent Systems

This dissertation is concerned with the theoretical analysis of component-based models for concurrent systems. We focus on interaction systems, which were introduced by Sifakis et al. in 2003. Centered around interaction systems, we also cover Minsky machines, Petri nets and the Linda calculus and establish relations between the models by giving translations from one to the other. Thus, we gain an insight concerning the expressiveness of the models and learn, given a system described in one syntax, how to simulate it in another. Additionally, these translations allow us to deduce complexity and undecidability results. Namely, we show that the questions whether a LinCa process terminates or diverges under a maximum progress semantics are undecidable. We also prove that the problems of reachability, progress, local and global deadlock and availability are PSPACE-complete in interaction systems. This complexity-theoretic classification serves as a motivation for the sufficient condition approach that is presented in the second half of this work: We present a generic approach to prove properties for component-based systems that allow for decomposition into subsystems. To avoid the problem of state space explosion, we consider overlapping projections and thus compute over-approximations of the reachable global state space. We enhance the quality of these over-approximations by a technique we call Cross-Checking. Based on the enhanced over-approximations, we may then prove properties of the global system in polynomial time. We demonstrate our ideas by means of interaction systems and for the property of local deadlock

Formale Verifikation von Mikroprozessoren mit Pipeline

Subject of this thesis is the formal verification of pipelined microprocessors. This includes processors with state of the art schedulers, such as the Tomasulo scheduler and speculation. In contrast to most of the literature, we verify synthesizable design at gate level. Furthermore, we prove both data consistency and liveness. We verify the proofs using the theorem proving system PVS. We verify both in-order and out-of-order machines. For verifying in-order machines, we extend the stall engine concept presented in [MP00]. We describe and implement an algorithm that does the transformation into a pipelined machine. We describe a generic machine that supports speculating on arbitraty values. We formally verify proofs for the Tomasulo scheduling algorithm with reorder buffer.Gegenstand dieser Dissertation ist die formale Verifikation von Mikroprozessoren mit Pipeline. Dies beinhaltet auch Prozessoren mit aktuellen Scheduling-Verfahren wie den Tomasulo Scheduler und spekulativer Ausfuehrung. Im Gegensatz zu weiten Teilen der bestehenden Literatur fuehren wir die Verifikation auf Gatter-Ebene durch. Des weitern beweisen wir sowohl Datenkonsistenz als auch eine obere Schranke fuer die Ausfuehrungszeit. Die Beweise werden mit dem Theorem Beweissystem PVS verifiziert. Es werden sowohl in-order Maschinen als auch out-of-order Maschinen verifiziert. Zur Verifikation der in-order Maschinen erweitern wir die Stall Engine aus [MP00]. Wir beschreiben und Implementieren ein Verfahren das die Transformation in die "pipelined machine'; durchfuehrt. Wir beschreiben eine generische Maschine die Spekulation auf beliebige Werte erlaubt. Wir verifizieren die Beweise fuer den Tomasulo Scheduler mit Reorder Buffer

Formal verification of pipelined microprocessors

Subject of this thesis is the formal verification of pipelined microprocessors. This includes processors with state of the art schedulers, such as the Tomasulo scheduler and speculation. In contrast to most of the literature, we verify synthesizable design at gate level. Furthermore, we prove both data consistency and liveness. We verify the proofs using the theorem proving system PVS. We verify both in-order and out-of-order machines. For verifying in-order machines, we extend the stall engine concept presented in [MP00]. We describe and implement an algorithm that does the transformation into a pipelined machine. We describe a generic machine that supports speculating on arbitraty values. We formally verify proofs for the Tomasulo scheduling algorithm with reorder buffer.Gegenstand dieser Dissertation ist die formale Verifikation von Mikroprozessoren mit Pipeline. Dies beinhaltet auch Prozessoren mit aktuellen Scheduling-Verfahren wie den Tomasulo Scheduler und spekulativer Ausfuehrung. Im Gegensatz zu weiten Teilen der bestehenden Literatur fuehren wir die Verifikation auf Gatter-Ebene durch. Des weitern beweisen wir sowohl Datenkonsistenz als auch eine obere Schranke fuer die Ausfuehrungszeit. Die Beweise werden mit dem Theorem Beweissystem PVS verifiziert. Es werden sowohl in-order Maschinen als auch out-of-order Maschinen verifiziert. Zur Verifikation der in-order Maschinen erweitern wir die Stall Engine aus [MP00]. Wir beschreiben und Implementieren ein Verfahren das die Transformation in die "pipelined machine\u27; durchfuehrt. Wir beschreiben eine generische Maschine die Spekulation auf beliebige Werte erlaubt. Wir verifizieren die Beweise fuer den Tomasulo Scheduler mit Reorder Buffer